cpu_dma.h
Go to the documentation of this file.
1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  * 2017 OTA keys S.A.
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
10 #pragma once
11 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
31 typedef struct {
54  int stream;
55 } dma_conf_t;
56 
60 typedef unsigned dma_t;
61 
65 typedef enum {
69 } dma_mode_t;
70 
74 typedef enum {
79 } dma_burst_t;
80 
84 typedef enum {
90 
95 #define DMA_CHAN_CONFIG_UNSUPPORTED (UINT8_MAX)
96 
101 #define DMA_INC_SRC_ADDR (0x04)
102 #define DMA_INC_DST_ADDR (0x08)
103 #define DMA_INC_BOTH_ADDR (DMA_INC_SRC_ADDR | DMA_INC_DST_ADDR)
110 #define DMA_DATA_WIDTH_BYTE (0x00)
111 #define DMA_DATA_WIDTH_HALF_WORD (0x01)
112 #define DMA_DATA_WIDTH_WORD (0x02)
115 #ifdef MODULE_PERIPH_DMA
119 #define DMA_STREAM_UNDEF (UINT_MAX)
120 
124 void dma_init(void);
125 
142 int dma_transfer(dma_t dma, int chan, const volatile void *src, volatile void *dst, size_t len,
143  dma_mode_t mode, uint8_t flags);
144 
150 void dma_acquire(dma_t dma);
151 
157 void dma_release(dma_t dma);
158 
167 void dma_start(dma_t dma);
168 
176 uint16_t dma_suspend(dma_t dma);
177 
184 void dma_resume(dma_t dma, uint16_t remaining);
185 
191 void dma_stop(dma_t dma);
192 
198 void dma_wait(dma_t dma);
199 
213 int dma_configure(dma_t dma, int chan, const volatile void *src, volatile void *dst, size_t len,
214  dma_mode_t mode, uint8_t flags);
215 
230 void dma_setup(dma_t dma, int chan, void *periph_addr, dma_mode_t mode,
231  uint8_t width, bool inc_periph);
232 
253 void dma_setup_ext(dma_t dma, dma_burst_t pburst, dma_burst_t mburst,
254  bool fifo, dma_fifo_thresh_t thresh, bool pfctrl);
255 
264 void dma_prepare(dma_t dma, void *mem, size_t len, bool incr_mem);
265 
266 #endif /* MODULE_PERIPH_DMA */
267 
268 #ifdef __cplusplus
269 }
270 #endif
271 
dma_burst_t
Burst Transfer modes for F2/F4/F7.
Definition: cpu_dma.h:74
@ DMA_BURST_INCR4
incremental burst of 4 beats
Definition: cpu_dma.h:76
@ DMA_BURST_INCR8
incremental burst of 8 beats
Definition: cpu_dma.h:77
@ DMA_BURST_SINGLE
single transfer
Definition: cpu_dma.h:75
@ DMA_BURST_INCR16
incremental burst of 16 beats
Definition: cpu_dma.h:78
dma_fifo_thresh_t
Threshold selection in FIFO mode for F2/F4F7.
Definition: cpu_dma.h:84
@ DMA_FIFO_FULL_3_4
3/4 full FIFO
Definition: cpu_dma.h:87
@ DMA_FIFO_FULL_1_4
1/4 full FIFO
Definition: cpu_dma.h:85
@ DMA_FIFO_FULL_1_2
1/2 full FIFO
Definition: cpu_dma.h:86
@ DMA_FIFO_FULL
Full FIFO.
Definition: cpu_dma.h:88
unsigned dma_t
DMA type.
Definition: cpu_dma.h:60
dma_mode_t
DMA modes.
Definition: cpu_dma.h:65
@ DMA_PERIPH_TO_MEM
Peripheral to memory.
Definition: cpu_dma.h:66
@ DMA_MEM_TO_PERIPH
Memory to peripheral.
Definition: cpu_dma.h:67
@ DMA_MEM_TO_MEM
Memory to memory.
Definition: cpu_dma.h:68
void dma_prepare(dma_t dma, uint8_t width, const void *src, void *dst, size_t num, dma_incr_t incr)
Prepare the DMA channel for an individual transfer.
void dma_init(void)
Initialize DMA.
void dma_wait(dma_t dma)
Wait for a DMA channel to finish the transfer.
void dma_setup(dma_t dma, unsigned trigger, uint8_t prio, bool irq)
Initialize a previously allocated DMA channel with one-time settings.
unsigned dma_t
DMA channel type.
void dma_start(dma_t dma)
Start a DMA transfer.
DMA configuration.
Definition: cpu_dma.h:31
int stream
DMA stream on stm32f2/4/7, channel on others STM32F2/4/7:
Definition: cpu_dma.h:54