cpu_qdec.h
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1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  * 2017 OTA keys S.A.
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
10 #pragma once
11 
23 #include <stdint.h>
24 
25 #include "cpu.h"
26 #include "periph/cpu_gpio.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
35 #define QDEC_CHAN (2U)
36 
40 typedef struct {
41  gpio_t pin;
42  uint8_t cc_chan;
43 } qdec_chan_t;
44 
48 typedef struct {
49  TIM_TypeDef *dev;
50  uint32_t max;
51  uint32_t rcc_mask;
54 #ifdef CPU_FAM_STM32F1
55  uint32_t remap;
57 #else
59 #endif
60  uint8_t bus;
61  uint8_t irqn;
62 } qdec_conf_t;
63 
64 #ifdef __cplusplus
65 }
66 #endif
67 
GPIO CPU definitions for the STM32 family.
#define QDEC_CHAN
All STM QDEC timers have 2 capture channels.
Definition: cpu_qdec.h:35
gpio_af_t
Override alternative GPIO mode options.
Definition: periph_cpu.h:165
QDEC channel.
Definition: cpu_qdec.h:40
uint8_t cc_chan
capture compare channel used
Definition: cpu_qdec.h:42
gpio_t pin
GPIO pin mapped to this channel.
Definition: cpu_qdec.h:41
Quadrature decoder configuration struct.
uint32_t max
Maximum counter value.
Definition: cpu_qdec.h:50
uint8_t irqn
global IRQ channel
Definition: cpu_qdec.h:61
gpio_af_t af
alternate function used
Definition: cpu_qdec.h:58
uint32_t rcc_mask
bit in clock enable register
Definition: cpu_qdec.h:51
TIM_TypeDef * dev
Timer used.
Definition: cpu_qdec.h:49
uint8_t bus
APB bus.
Definition: cpu_qdec.h:60