msp430_regs.h
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1 /*
2  * Copyright (C) 2015 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
9 #pragma once
10 
25 #include <stdint.h>
26 #include <stddef.h>
27 
28 #include "msp430_regs_common.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
43 #define MSP430_USCI_A_B_OFFSET 3U
44 
56 #define MSP430_USCI_B_FROM_USCI_A(usci_a) \
57  ((msp430_usci_b_t *)((uintptr_t)(usci_a) + MSP430_USCI_A_B_OFFSET))
58 
62 typedef struct {
66  REG8 IE;
70 
74 typedef struct {
75  REG8 IN;
76  uint8_t _padding1;
77  REG8 OD;
78  uint8_t _padding2;
80  uint8_t _padding3;
83 
87 typedef struct {
100 
104 typedef struct {
114 
123 #define UCSSEL_UCLKI UCSSEL_0
124 #define UCSSEL_ACLK UCSSEL_1
125 #define UCSSEL_SMCLK UCSSEL_2
127 #if (UCSSEL0 == 0x40) || DOXYGEN
128 # define UCSSEL_Pos 6
129 #else
130 # error "USSEL field in USCI CTL1 register is at unexpected position"
131 #endif
142 #define UCBRS_MASK UCBRS_7
144 #if (UCBRS_7 == 0x0E) || defined(DOXYGEN)
145 # define UCBRS_Pos 1
147 #else
148 /* The datasheet for the whole MCU family states the field is in bits 3-1,
149  * but let's better be safe than sorry here */
150 # error "UCBRS field in the UCAxMCTL register at unexpected position."
151 #endif
152 
170 {
171  uintptr_t usci_b = (uintptr_t)usci_a + offsetof(msp430_usci_a_t, CTL0);
172  return (msp430_usci_b_t *)usci_b;
173 }
174 
184 extern msp430_usci_a_t USCI_A0;
190 extern msp430_usci_a_t USCI_A1;
196 extern msp430_usci_b_t USCI_B0;
202 extern msp430_usci_b_t USCI_B1;
205 #ifdef __cplusplus
206 }
207 #endif
208 
#define REG8
Register types.
msp430_usci_a_t USCI_A0
USCI_A0 register map.
msp430_usci_b_t USCI_B1
USCI_B1 register map.
msp430_usci_b_t USCI_B0
USCI_B0 register map.
static msp430_usci_b_t * msp430_usci_b_from_usci_a(msp430_usci_a_t *usci_a)
"Convert" a USCI A into an USCI B interface
Definition: msp430_regs.h:169
msp430_usci_a_t USCI_A1
USCI_A1 register map.
Cortex CMSIS style definition of MSP430 registers.
GPIO Port 1/2 (with interrupt functionality)
Definition: msp430_regs.h:62
REG8 IFG
interrupt flag
Definition: msp430_regs.h:64
REG8 SEL
alternative function select
Definition: msp430_regs.h:67
REG8 IES
interrupt edge select
Definition: msp430_regs.h:65
REG8 REN
pull resistor enable
Definition: msp430_regs.h:68
msp430_port_t base
common GPIO port registers
Definition: msp430_regs.h:63
REG8 IE
interrupt enable
Definition: msp430_regs.h:66
GPIO Port 7/8 (different register layout than Ports 1-6)
Definition: msp430_regs.h:74
REG8 IN
input data
Definition: msp430_regs.h:75
uint8_t _padding1
unrelated I/O
Definition: msp430_regs.h:76
REG8 OD
output data
Definition: msp430_regs.h:77
uint8_t _padding3
unrelated I/O
Definition: msp430_regs.h:80
REG8 SEL
alternative function select
Definition: msp430_regs.h:81
REG8 DIR
pin direction
Definition: msp430_regs.h:79
uint8_t _padding2
unrelated I/O
Definition: msp430_regs.h:78
Common MSP GPIO Port Registers.
Universal Serial Control Interface Type A (USCI_A) Registers.
Definition: msp430_regs.h:87
REG8 MCTL
modulation control
Definition: msp430_regs.h:95
REG8 IRTCTL
IrDA transmit control.
Definition: msp430_regs.h:89
REG8 TXBUF
transmit buffer
Definition: msp430_regs.h:98
REG8 ABCTL
auto baud rate control
Definition: msp430_regs.h:88
REG8 BR1
baud rate control 1
Definition: msp430_regs.h:94
REG8 BR0
baud rate control 0
Definition: msp430_regs.h:93
REG8 STAT
status register
Definition: msp430_regs.h:96
REG8 RXBUF
receive buffer
Definition: msp430_regs.h:97
REG8 CTL1
control 1
Definition: msp430_regs.h:92
REG8 IRRCTL
IrDA receive control.
Definition: msp430_regs.h:90
REG8 CTL0
control 0
Definition: msp430_regs.h:91
Universal Serial Control Interface Type B (USCI_B) Registers.
Definition: msp430_regs.h:104
REG8 RXBUF
receive buffer
Definition: msp430_regs.h:111
REG8 BR1
baud rate control 1
Definition: msp430_regs.h:108
REG8 BR0
baud rate control 0
Definition: msp430_regs.h:107
REG8 STAT
status register
Definition: msp430_regs.h:110
REG8 CTL1
control 1
Definition: msp430_regs.h:106
REG8 CTL0
control 0
Definition: msp430_regs.h:105
REG8 TXBUF
transmit buffer
Definition: msp430_regs.h:112
REG8 MCTL
modulation control
Definition: msp430_regs.h:109