cfg_spi_default.h
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1 /*
2  * Copyright (C) 2020 Koen Zandberg <koen@bergzand.net>
3  * 2023 Gunar Schorcht <gunar@schorcht.net>
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
10 #pragma once
11 
23 #include "periph_cpu.h"
24 
25 #ifdef __cplusplus
26 extern "C" {
27 #endif
28 
43 #ifndef SPI_DEV_1_USED
44 #define SPI_DEV_1_USED 0
45 #endif
46 
53 #ifndef SPI_DEV_0_CS
54 #define SPI_DEV_0_CS GPIO_PIN(PORT_B, 12)
55 #endif
56 
63 #ifndef SPI_DEV_1_CS
64 #define SPI_DEV_1_CS GPIO_PIN(PORT_B, 5)
65 #endif
66 
78 static const spi_conf_t spi_config[] = {
79  {
80  .dev = SPI1,
81  .mosi_pin = GPIO_PIN(PORT_B, 15),
82  .miso_pin = GPIO_PIN(PORT_B, 14),
83  .sclk_pin = GPIO_PIN(PORT_B, 13),
84  .cs_pin = SPI_DEV_0_CS,
85  .rcumask = RCU_APB1EN_SPI1EN_Msk,
86  .apbbus = APB1,
87  },
88 #if SPI_DEV_1_USED
89  {
90  .dev = SPI0,
91  .mosi_pin = GPIO_PIN(PORT_A, 7),
92  .miso_pin = GPIO_PIN(PORT_A, 6),
93  .sclk_pin = GPIO_PIN(PORT_A, 5),
94  .cs_pin = SPI_DEV_1_CS,
95  .rcumask = RCU_APB2EN_SPI0EN_Msk,
96  .apbbus = APB2,
97  },
98 #endif
99 };
100 
101 #define SPI_NUMOF ARRAY_SIZE(spi_config)
104 #ifdef __cplusplus
105 }
106 #endif
107 
@ PORT_B
port B
Definition: periph_cpu.h:47
@ PORT_A
port A
Definition: periph_cpu.h:46
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:45
#define SPI_DEV_0_CS
Defines PB12 as the default CS signal for SPI_DEV(0)
#define SPI_DEV_1_CS
Defines PA4 as the default CS signal for SPI_DEV(1)
static const spi_conf_t spi_config[]
Default SPI device configuration.
@ APB1
Advanced Peripheral Bus 1
Definition: periph_cpu.h:78
@ APB2
Advanced Peripheral Bus 2
Definition: periph_cpu.h:79
SPI device configuration.
Definition: periph_cpu.h:336
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:337