31 #if IS_USED(MODULE_L3GXXXX_I2C) || DOXYGEN
33 #ifndef L3GXXXX_I2C_DEV
35 #define L3GXXXX_I2C_DEV (I2C_DEV(0))
38 #ifndef L3GXXXX_I2C_ADDR
40 #define L3GXXXX_I2C_ADDR (L3GXXXX_I2C_ADDR_2)
43 #ifndef L3GXXXX_I2C_IF_PARAMS
45 #define L3GXXXX_I2C_IF_PARAMS .if_params.type = L3GXXXX_I2C, \
46 .if_params.i2c.dev = L3GXXXX_I2C_DEV, \
47 .if_params.i2c.addr = L3GXXXX_I2C_ADDR,
52 #if IS_USED(MODULE_L3GXXXX_SPI) || DOXYGEN
54 #ifndef L3GXXXX_SPI_DEV
56 #define L3GXXXX_SPI_DEV SPI_DEV(0)
59 #ifndef L3GXXXX_SPI_CLK
61 #define L3GXXXX_SPI_CLK (SPI_CLK_1MHZ)
64 #ifndef L3GXXXX_SPI_CS
66 #define L3GXXXX_SPI_CS (GPIO_PIN(0, 0))
69 #ifndef L3GXXXX_SPI_IF_PARAMS
71 #define L3GXXXX_SPI_IF_PARAMS .if_params.type = L3GXXXX_SPI, \
72 .if_params.spi.dev = L3GXXXX_SPI_DEV, \
73 .if_params.spi.clk = L3GXXXX_SPI_CLK, \
74 .if_params.spi.cs = L3GXXXX_SPI_CS,
79 #ifndef L3GXXXX_INT1_PIN
81 #define L3GXXXX_INT1_PIN (GPIO_PIN(0, 1))
84 #ifndef L3GXXXX_INT2_PIN
86 #define L3GXXXX_INT2_PIN (GPIO_PIN(0, 2))
98 #ifdef CONFIG_L3GXXXX_ODR_100_12
99 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_100_12)
100 #elif CONFIG_L3GXXXX_ODR_100_25
101 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_100_25)
102 #elif CONFIG_L3GXXXX_ODR_200_12
103 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_200_12)
104 #elif CONFIG_L3GXXXX_ODR_200_25
105 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_200_25)
106 #elif CONFIG_L3GXXXX_ODR_200_50
107 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_200_50)
108 #elif CONFIG_L3GXXXX_ODR_200_70
109 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_200_70)
110 #elif CONFIG_L3GXXXX_ODR_400_20
111 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_400_20)
112 #elif CONFIG_L3GXXXX_ODR_400_25
113 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_400_25)
114 #elif CONFIG_L3GXXXX_ODR_400_50
115 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_400_50)
116 #elif CONFIG_L3GXXXX_ODR_400_110
117 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_400_110)
118 #elif CONFIG_L3GXXXX_ODR_800_30
119 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_800_30)
120 #elif CONFIG_L3GXXXX_ODR_800_35
121 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_800_35)
122 #elif CONFIG_L3GXXXX_ODR_800_50
123 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_800_50)
124 #elif CONFIG_L3GXXXX_ODR_800_100
125 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_800_100)
126 #elif CONFIG_L3GXXXX_ODR_12
127 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_12)
128 #elif CONFIG_L3GXXXX_ODR_25
129 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_25)
130 #elif CONFIG_L3GXXXX_ODR_50
131 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_50)
134 #ifdef CONFIG_L3GXXXX_SCALE_245_DPS
135 #define CONFIG_L3GXXXX_SCALE (L3GXXXX_SCALE_245_DPS)
136 #elif CONFIG_L3GXXXX_SCALE_500_DPS
137 #define CONFIG_L3GXXXX_SCALE (L3GXXXX_SCALE_500_DPS)
138 #elif CONFIG_L3GXXXX_SCALE_2000_DPS
139 #define CONFIG_L3GXXXX_SCALE (L3GXXXX_SCALE_2000_DPS)
142 #ifdef CONFIG_L3GXXXX_NO_FILTER
143 #define CONFIG_L3GXXXX_FILTER_SEL (L3GXXXX_NO_FILTER)
144 #elif CONFIG_L3GXXXX_HPF_ONLY
145 #define CONFIG_L3GXXXX_FILTER_SEL (L3GXXXX_HPF_ONLY)
146 #elif CONFIG_L3GXXXX_LPF2_ONLY
147 #define CONFIG_L3GXXXX_FILTER_SEL (L3GXXXX_LPF2_ONLY)
148 #elif CONFIG_L3GXXXX_HPF_AND_LPF2
149 #define CONFIG_L3GXXXX_FILTER_SEL (L3GXXXX_HPF_AND_LPF2)
152 #ifdef CONFIG_L3GXXXX_HPF_NORMAL
153 #define CONFIG_L3GXXXX_HPF_MODE (L3GXXXX_HPF_NORMAL)
154 #elif CONFIG_L3GXXXX_HPF_REFERENCE
155 #define CONFIG_L3GXXXX_HPF_MODE (L3GXXXX_HPF_REFERENCE)
156 #elif CONFIG_L3GXXXX_HPF_AUTORESET
157 #define CONFIG_L3GXXXX_HPF_MODE (L3GXXXX_HPF_AUTORESET)
160 #ifdef CONFIG_L3GXXXX_FIFO_MODE_BYPASS
161 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_BYPASS)
162 #elif CONFIG_L3GXXXX_FIFO_MODE_FIFO
163 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_FIFO)
164 #elif CONFIG_L3GXXXX_FIFO_MODE_STREAM
165 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_STREAM)
166 #elif CONFIG_L3GXXXX_FIFO_MODE_STREAM_TO_FIFO
167 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_STREAM_TO_FIFO)
168 #elif CONFIG_L3GXXXX_FIFO_MODE_BYPASS_TO_STREAM
169 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_BYPASS_TO_STREAM)
170 #elif CONFIG_L3GXXXX_FIFO_MODE_DYNAMIC_STREAM
171 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_DYNAMIC_STREAM
172 #elif CONFIG_L3GXXXX_FIFO_MODE_BYPASS_TO_FIFO
173 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_BYPASS_TO_FIFO)
176 #ifdef CONFIG_L3GXXXX_INT1_NO_FILTER
177 #define CONFIG_L3GXXXX_INT1_FILTER (L3GXXXX_NO_FILTER)
178 #elif CONFIG_L3GXXXX_INT1_HPF_ONLY
179 #define CONFIG_L3GXXXX_INT1_FILTER (L3GXXXX_HPF_ONLY)
180 #elif CONFIG_L3GXXXX_INT1_LPF2_ONLY
181 #define CONFIG_L3GXXXX_INT1_FILTER (L3GXXXX_LPF2_ONLY)
182 #elif CONFIG_L3GXXXX_INT1_HPF_AND_LPF2
183 #define CONFIG_L3GXXXX_INT1_FILTER (L3GXXXX_HPF_AND_LPF2)
188 #ifndef CONFIG_L3GXXXX_ODR
190 #define CONFIG_L3GXXXX_ODR (L3GXXXX_ODR_100_25)
193 #ifndef CONFIG_L3GXXXX_SCALE
195 #define CONFIG_L3GXXXX_SCALE (L3GXXXX_SCALE_245_DPS)
198 #ifndef CONFIG_L3GXXXX_FILTER_SEL
200 #define CONFIG_L3GXXXX_FILTER_SEL (L3GXXXX_HPF_AND_LPF2)
203 #ifndef CONFIG_L3GXXXX_HPF_MODE
205 #define CONFIG_L3GXXXX_HPF_MODE (L3GXXXX_HPF_NORMAL)
208 #ifndef CONFIG_L3GXXXX_HPF_CUTOFF
210 #define CONFIG_L3GXXXX_HPF_CUTOFF (0)
213 #ifndef CONFIG_L3GXXXX_FIFO_MODE
215 #define CONFIG_L3GXXXX_FIFO_MODE (L3GXXXX_FIFO)
218 #ifndef CONFIG_L3GXXXX_FIFO_WATERMARK
220 #define CONFIG_L3GXXXX_FIFO_WATERMARK (23)
223 #ifndef CONFIG_L3GXXXX_INT1_X_THRESH
225 #define CONFIG_L3GXXXX_INT1_X_THRESH (4012)
228 #ifndef CONFIG_L3GXXXX_INT1_X_GT_THRESH
230 #define CONFIG_L3GXXXX_INT1_X_GT_THRESH (true)
233 #ifndef CONFIG_L3GXXXX_INT1_X_LT_THRESH
235 #define CONFIG_L3GXXXX_INT1_X_LT_THRESH (false)
238 #ifndef CONFIG_L3GXXXX_INT1_Y_THRESH
240 #define CONFIG_L3GXXXX_INT1_Y_THRESH (4012)
243 #ifndef CONFIG_L3GXXXX_INT1_Y_GT_THRESH
245 #define CONFIG_L3GXXXX_INT1_Y_GT_THRESH (true)
248 #ifndef CONFIG_L3GXXXX_INT1_Y_LT_THRESH
250 #define CONFIG_L3GXXXX_INT1_Y_LT_THRESH (false)
253 #ifndef CONFIG_L3GXXXX_INT1_Z_THRESH
255 #define CONFIG_L3GXXXX_INT1_Z_THRESH (4012)
258 #ifndef CONFIG_L3GXXXX_INT1_Z_GT_THRESH
260 #define CONFIG_L3GXXXX_INT1_Z_GT_THRESH (true)
263 #ifndef CONFIG_L3GXXXX_INT1_Z_LT_THRESH
265 #define CONFIG_L3GXXXX_INT1_Z_LT_THRESH (false)
268 #ifndef CONFIG_L3GXXXX_INT1_FILTER
270 #define CONFIG_L3GXXXX_INT1_FILTER (L3GXXXX_HPF_AND_LPF2)
273 #ifndef CONFIG_L3GXXXX_INT1_AND
275 #define CONFIG_L3GXXXX_INT1_AND (false)
278 #ifndef CONFIG_L3GXXXX_INT1_LATCH
280 #define CONFIG_L3GXXXX_INT1_LATCH (true)
283 #if IS_USED(MODULE_L3GXXXX_IRQ_EVENT) || DOXYGEN
285 #define L3GXXXX_INT1_PARAMS .int1_pin = L3GXXXX_INT1_PIN, \
286 .int1_cfg.x_high_enabled = CONFIG_L3GXXXX_INT1_X_GT_THRESH, \
287 .int1_cfg.y_high_enabled = CONFIG_L3GXXXX_INT1_Y_GT_THRESH, \
288 .int1_cfg.z_high_enabled = CONFIG_L3GXXXX_INT1_Z_GT_THRESH, \
289 .int1_cfg.x_low_enabled = CONFIG_L3GXXXX_INT1_X_LT_THRESH, \
290 .int1_cfg.y_low_enabled = CONFIG_L3GXXXX_INT1_Y_LT_THRESH, \
291 .int1_cfg.z_low_enabled = CONFIG_L3GXXXX_INT1_Z_LT_THRESH, \
292 .int1_cfg.x_threshold = CONFIG_L3GXXXX_INT1_X_THRESH, \
293 .int1_cfg.y_threshold = CONFIG_L3GXXXX_INT1_Y_THRESH, \
294 .int1_cfg.z_threshold = CONFIG_L3GXXXX_INT1_Z_THRESH, \
295 .int1_cfg.filter = CONFIG_L3GXXXX_INT1_FILTER, \
296 .int1_cfg.and_or = CONFIG_L3GXXXX_INT1_AND, \
297 .int1_cfg.latch = CONFIG_L3GXXXX_INT1_LATCH,
299 #define L3GXXXX_INT1_PARAMS
302 #if IS_USED(MODULE_L3GXXXX_IRQ_DATA) || DOXYGEN
304 #define L3GXXXX_INT2_PARAMS .int2_pin = L3GXXXX_INT2_PIN,
306 #define L3GXXXX_INT2_PARAMS
309 #if IS_USED(MODULE_L3GXXXX_FIFO) || DOXYGEN
311 #define L3GXXXX_FIFO_PARAMS .fifo_mode = CONFIG_L3GXXXX_FIFO_MODE, \
312 .fifo_watermark = CONFIG_L3GXXXX_FIFO_WATERMARK,
314 #define L3GXXXX_FIFO_PARAMS
317 #if IS_USED(MODULE_L3GXXXX_I2C) || DOXYGEN
319 #ifndef L3GXXXX_I2C_PARAMS
321 #define L3GXXXX_I2C_PARAMS { \
322 L3GXXXX_I2C_IF_PARAMS \
323 .odr = CONFIG_L3GXXXX_ODR, \
324 .scale = CONFIG_L3GXXXX_SCALE, \
325 .filter_sel = CONFIG_L3GXXXX_FILTER_SEL, \
326 .hpf_mode = CONFIG_L3GXXXX_HPF_MODE, \
327 .hpf_cutoff = CONFIG_L3GXXXX_HPF_CUTOFF, \
328 L3GXXXX_FIFO_PARAMS \
329 L3GXXXX_INT1_PARAMS \
330 L3GXXXX_INT2_PARAMS \
335 #if IS_USED(MODULE_L3GXXXX_SPI) || DOXYGEN
336 #ifndef L3GXXXX_SPI_PARAMS
338 #define L3GXXXX_SPI_PARAMS { \
339 L3GXXXX_SPI_IF_PARAMS \
340 .odr = CONFIG_L3GXXXX_ODR, \
341 .scale = CONFIG_L3GXXXX_SCALE, \
342 .filter_sel = CONFIG_L3GXXXX_FILTER_SEL, \
343 .hpf_mode = CONFIG_L3GXXXX_HPF_MODE, \
344 .hpf_cutoff = CONFIG_L3GXXXX_HPF_CUTOFF, \
345 L3GXXXX_FIFO_PARAMS \
346 L3GXXXX_INT1_PARAMS \
347 L3GXXXX_INT2_PARAMS \
352 #ifndef L3GXXXX_SAUL_INFO
354 #define L3GXXXX_SAUL_INFO { .name = "l3gxxxx" }
363 #if IS_USED(MODULE_L3GXXXX_I2C) || DOXYGEN
366 #if IS_USED(MODULE_L3GXXXX_SPI) || DOXYGEN
Device Driver for ST L3Gxxxx 3-axis gyroscope sensor family.
static const l3gxxxx_params_t l3gxxxx_params[]
Allocate some memory to store the actual configuration.
#define L3GXXXX_SAUL_INFO
Default SAUL device info.
static const saul_reg_info_t l3gxxxx_saul_info[]
Additional meta information to keep in the SAUL registry.
#define L3GXXXX_I2C_PARAMS
Default I2C device parameter set.
#define L3GXXXX_SPI_PARAMS
Default SPI device parameter set.
SAUL registry interface definition.
L3Gxxxx device initialization parameters.
Additional data to collect for each entry.