periph_cpu.h

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/*
 * SPDX-FileCopyrightText: 2025 Tom Hert <git@annsann.eu>
 * SPDX-FileCopyrightText: 2025 HAW Hamburg
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once
 
#include <stdbool.h>
#include <stdint.h>
 
#include "RP2350.h"
#include "clock_conf.h"
#include "cpu.h"
#include "gpio_conf.h"
#include "helpers.h"
#include "uart_conf.h"
 
#define HAVE_GPIO_T
typedef uint32_t gpio_t;
 
#include "periph/gpio.h"
 
#define OSC_DEBUG_PIN_ID 15u
 
#define RESET_PLL_SYS (1u << 14u)
 
#define RESET_PADS_BANK0 (1u << 9u)
 
#define RESET_UART0 (1u << 26u)
 
#define RESET_UART1 (1u << 27u)
 
#define RESET_IO_BANK0 (1u << 6u)
 
#define PADS_BANK0_GPIO0_IE_BITS (1u << 6u)
 
#define PADS_BANK0_ISO_BITS (1u << 8u)
 
#ifdef __cplusplus
extern "C" {
#endif
 
static inline uint32_t calculate_gpio_pad_register_addr(gpio_t pin) {
    /* Each pin has a 4 byte register, so we can calculate the address
    * by adding 4 bytes for each pin, starting at the base address of PADS_BANK0
    * and adding 4 bytes to skip VOLTAGE_SELECT */
    return PADS_BANK0_BASE + 4 * (pin + 1);
}
 
static uint32_t calculate_gpio_io_status_register_addr(gpio_t pin) {
    /* Each status register is followed by a ctrl register, */
    return IO_BANK0_BASE + 8 * pin;
}
 
static inline uint32_t calculate_gpio_io_ctrl_register_addr(gpio_t pin) {
    /* Each pin has a 8 byte register (4 Bytes of Status, 4 Bytes of CTRL),
     * so we can calculate the address by adding 8 bytes for each pin,
     * starting at the base address of IO_BANK0 */
    return calculate_gpio_io_status_register_addr(pin) + 4;
}
 
#ifdef __cplusplus
}
#endif