ads1x1x_internal.h

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/*
 * SPDX-FileCopyrightText: 2017 OTA keys S.A.
 * SPDX-FileCopyrightText: 2018 Acutam Automation, LLC
 * SPDX-FileCopyrightText: 2025 Baptiste Le Duc <baptiste.leduc38@gmail.com>
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once
 
#include <stdint.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define ADS1X1X_CONV_RES_ADDR      (0)  
#define ADS1X1X_CONF_ADDR          (1)  
#define ADS1X1X_LOW_LIMIT_ADDR     (2)  
#define ADS1X1X_HIGH_LIMIT_ADDR    (3)  
#define ADS1X1X_CONF_OS_CONV_MASK         (1 << 7) 
#define ADS1X1X_MUX_MASK           ((1 << 6) | (1 << 5) | (1 << 4)) 
#define ADS1X1X_AIN0_DIFFM_AIN1    ((0 << 6) | (0 << 5) | (0 << 4)) 
#define ADS1X1X_AIN0_DIFFM_AIN3    ((0 << 6) | (0 << 5) | (1 << 4)) 
#define ADS1X1X_AIN1_DIFFM_AIN3    ((0 << 6) | (1 << 5) | (0 << 4)) 
#define ADS1X1X_AIN2_DIFFM_AIN3    ((0 << 6) | (1 << 5) | (1 << 4)) 
#define ADS1X1X_AIN0_SINGM         ((1 << 6) | (0 << 5) | (0 << 4)) 
#define ADS1X1X_AIN1_SINGM         ((1 << 6) | (0 << 5) | (1 << 4)) 
#define ADS1X1X_AIN2_SINGM         ((1 << 6) | (1 << 5) | (0 << 4)) 
#define ADS1X1X_AIN3_SINGM         ((1 << 6) | (1 << 5) | (1 << 4)) 
#define ADS1X1X_PGA_MASK         ((1 << 3) | (1 << 2) | (1 << 1))   
#define ADS1X1X_PGA_FSR_6V144    ((0 << 3) | (0 << 2) | (0 << 1))   
#define ADS1X1X_PGA_FSR_4V096    ((0 << 3) | (0 << 2) | (1 << 1))   
#define ADS1X1X_PGA_FSR_2V048    ((0 << 3) | (1 << 2) | (0 << 1))   
#define ADS1X1X_PGA_FSR_1V024    ((0 << 3) | (1 << 2) | (1 << 1))   
#define ADS1X1X_PGA_FSR_0V512    ((1 << 3) | (0 << 2) | (0 << 1))   
#define ADS1X1X_PGA_FSR_0V256    ((1 << 3) | (0 << 2) | (1 << 1))   
#define ADS1X1X_MODE_MASK         (1 << 0)  
#define ADS1X1X_MODE_SINGLE       (1 << 0)  
#define ADS1X1X_MODE_CONTINUOUS   (0 << 0)  
#define ADS1X1X_DATAR_UNDEF   (0xFF)   
#define ADS1X1X_DATAR_MASK    ((1 << 7) | (1 << 6) | (1 << 5)) 
#if MODULE_ADS111X
#  define ADS111X_DATAR_8       ((0 << 7) | (0 << 6) | (0 << 5)) 
#  define ADS111X_DATAR_16      ((0 << 7) | (0 << 6) | (1 << 5)) 
#  define ADS111X_DATAR_64      ((0 << 7) | (1 << 6) | (0 << 5)) 
#  define ADS111X_DATAR_128     ((0 << 7) | (1 << 6) | (1 << 5)) 
#  define ADS111X_DATAR_250     ((1 << 7) | (0 << 6) | (0 << 5)) 
#  define ADS111X_DATAR_475     ((1 << 7) | (0 << 6) | (1 << 5)) 
#  define ADS111X_DATAR_860     ((1 << 7) | (1 << 6) | (0 << 5)) 
#endif
#if MODULE_ADS101X
#  define ADS101X_DATAR_128     ((0 << 7) | (0 << 6) | (0 << 5)) 
#  define ADS101X_DATAR_250     ((0 << 7) | (0 << 6) | (1 << 5)) 
#  define ADS101X_DATAR_490     ((0 << 7) | (1 << 6) | (0 << 5)) 
#  define ADS101X_DATAR_920     ((0 << 7) | (1 << 6) | (1 << 5)) 
#  define ADS101X_DATAR_1600    ((1 << 7) | (0 << 6) | (0 << 5)) 
#  define ADS101X_DATAR_2400    ((1 << 7) | (0 << 6) | (1 << 5)) 
#  define ADS101X_DATAR_3300    ((1 << 7) | (1 << 6) | (0 << 5)) 
#endif
#define ADS1X1X_COMP_MODE_MASK        (1 << 4)  
#define ADS1X1X_COMP_MODE_TRADITIONAL (0 << 4)  
#define ADS1X1X_COMP_MODE_WINDOW      (1 << 4)  
#define ADS1X1X_COMP_POLARITY_MASK (1 << 3) 
#define ADS1X1X_COMP_POLARITY_LOW  (0 << 3) 
#define ADS1X1X_COMP_POLARITY_HIGH (1 << 3) 
#define ADS1X1X_COMP_LATCH_MASK    (1 << 2) 
#define ADS1X1X_COMP_LATCH_DISABLE (0 << 2) 
#define ADS1X1X_COMP_LATCH_ENABLE  (1 << 2) 
#define ADS1X1X_COMP_QUEUE_MASK       ((1 << 1) | (1 << 0)) 
#define ADS1X1X_COMP_QUEUE_1          ((0 << 1) | (0 << 0)) 
#define ADS1X1X_COMP_QUEUE_2          ((0 << 1) | (1 << 0)) 
#define ADS1X1X_COMP_QUEUE_4          ((1 << 1) | (0 << 0)) 
#define ADS1X1X_COMP_QUEUE_DISABLE    ((1 << 1) | (1 << 0)) 
#define ADS1X1X_BITS_RES_UNDEF (0)  
#if MODULE_ADS101X
#  define ADS101X_BITS_RES    (12) 
#endif
 
#if MODULE_ADS111X
#  define ADS111X_BITS_RES    (16) 
#endif
#define ADS1X1X_ALERT_MASK (ADS1X1X_COMP_QUEUE_MASK | ADS1X1X_COMP_LATCH_MASK | \
                            ADS1X1X_COMP_POLARITY_MASK | ADS1X1X_COMP_MODE_MASK)
 
static inline uint16_t _ads1x1x_get_pga_voltage(uint8_t pga)
{
    switch (pga) {
    case ADS1X1X_PGA_FSR_6V144: return 6144;
    case ADS1X1X_PGA_FSR_4V096: return 4096;
    case ADS1X1X_PGA_FSR_2V048: return 2048;
    case ADS1X1X_PGA_FSR_1V024: return 1024;
    case ADS1X1X_PGA_FSR_0V512: return 512;
    case ADS1X1X_PGA_FSR_0V256: return 256;
    default: return 0;
    }
}
 
#ifdef __cplusplus
}
#endif