Implementation of the kernels irq interface. More...
Implementation of the kernels irq interface.
Definition in file irq_arch.h.
#include "irq_arch_common.h"
 Include dependency graph for irq_arch.h:Go to the source code of this file.
Functions | |
| void | esp_irq_init (void) | 
| Initialize architecture specific interrupt handling.  | |
CPU interrupt numbers | |
All interrupts that are used for RIOT-OS are preallocated and fix. The allocated interrupts are all level interrupts, most of them with low priority.  | |
| #define | CPU_INUM_RMT 11 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_GPIO 2 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_BLE 5 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_BT_MAC 8 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_RTT 9 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_SERIAL_JTAG 10 | 
| Edge interrupt with low priority 1.  | |
| #define | CPU_INUM_I2C 12 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_UART 13 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_CAN 17 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_ETH 18 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_USB 18 | 
| Level interrupt with low priority 1.  | |
| #define | CPU_INUM_LCDCAM 19 | 
| Level interrupt with medium priority 2.  | |
| #define | CPU_INUM_FRC2 20 | 
| Level interrupt with medium priority 2.  | |
| #define | CPU_INUM_SYSTIMER 20 | 
| Level interrupt with medium priority 2.  | |
| #define | CPU_INUM_SDMMC 21 | 
| Level interrupt with medium priority 2.  | |
| #define | CPU_INUM_TIMER 22 | 
| Edge interrupt with medium priority 2.  | |
| #define | CPU_INUM_WDT 23 | 
| Level interrupt with medium priority 3.  | |
| #define | CPU_INUM_ZMAC 27 | 
| Level interrupt with medium priority 3.  | |
| #define | CPU_INUM_SOFTWARE 29 | 
| Software interrupt with medium priority 3.  | |