Files | Data Structures | Macros
CC26xx/CC13xx common
CPU

Common definitions for TI cc26xx/cc13xx family. More...

Detailed Description

Common definitions for TI cc26xx/cc13xx family.

This module contains definitions common to all cc26xx/cc13xx cpus supported by RIOT: TI CC26x0/CC13x0, TI CC26x2, CC13x2

Files

file  cc26xx_cc13xx.h
 CC26xx, CC13xx definitions.
 
file  cc26xx_cc13xx_adi.h
 CC26xx/CC13xx MCU I/O register definitions.
 
file  cc26xx_cc13xx_ccfg.h
 CC26xx/CC13xx CCFG register definitions.
 
file  cc26xx_cc13xx_gpio.h
 Driver for the cc26xx/cc13xx GPIO controller.
 
file  cc26xx_cc13xx_gpt.h
 definitions for the CC26xx/CC13XX GPT modules
 
file  cc26xx_cc13xx_hard_api.h
 CC26xx/CC13xx ROM Hard-API.
 
file  cc26xx_cc13xx_i2c.h
 CC26xx/CC13xx MCU I/O register definitions.
 
file  cc26xx_cc13xx_ioc.h
 CC26xx/CC13xx MCU I/O register definitions.
 
file  cc26xx_cc13xx_rfc.h
 CC26xx/CC13xx MCU I/O register definitions.
 
file  cc26xx_cc13xx_uart.h
 CC26xx/CC13xx UART interface.
 
file  cc26xx_cc13xx_vims.h
 CC26xx/CC13xx VIMS register definitions.
 
file  cc26xx_cc13xx_wdt.h
 CC26xx/CC13xx WDT register definitions.
 

Data Structures

struct  uart_regs_t
 UART component registers. More...
 

Macros

#define UART0   ((uart_regs_t *) (UART0_BASE))
 UART0 register bank.
 
#define UART1   ((uart_regs_t *) (UART1_BASE))
 UART1 register bank.
 
#define UART_DR_DATA_mask   0xFF
 UART register values.
 
#define UART_DR_FE   0x100
 
#define UART_DR_PE   0x200
 
#define UART_DR_BE   0x400
 
#define UART_DR_OE   0x800
 
#define UART_ECR_FE   0x1
 
#define UART_ECR_PE   0x2
 
#define UART_ECR_BE   0x4
 
#define UART_ECR_OE   0x8
 
#define UART_FR_CTS   0x1
 
#define UART_FR_BUSY   0x4
 
#define UART_FR_RXFE   0x10
 
#define UART_FR_TXFF   0x20
 
#define UART_FR_RXFF   0x40
 
#define UART_FR_TXFE   0x80
 
#define UART_LCRH_PEN   0x2
 
#define UART_LCRH_EPS   0x4
 
#define UART_LCRH_STP2   0x8
 
#define UART_LCRH_FEN   0x10
 
#define UART_LCRH_WLEN_mask   0x60
 
#define UART_LCRH_WLEN_5   0x0
 
#define UART_LCRH_WLEN_6   0x20
 
#define UART_LCRH_WLEN_7   0x40
 
#define UART_LCRH_WLEN_8   0x60
 
#define UART_LCRH_SPS   0x80
 
#define UART_CTL_UARTEN   0x1
 
#define UART_CTL_LBE   0x80
 
#define UART_CTL_TXE   0x100
 
#define UART_CTL_RXE   0x200
 
#define UART_CTL_RTS   0x800
 
#define UART_CTL_RTSEN   0x4000
 
#define UART_CTL_CTSEN   0x8000
 
#define UART_MIS_CTSMMIS   0x1
 
#define UART_MIS_RXMIS   0x10
 
#define UART_MIS_TXMIS   0x20
 
#define UART_MIS_RTMIS   0x40
 
#define UART_MIS_FEMIS   0x80
 
#define UART_MIS_PEMIS   0x100
 
#define UART_MIS_BEMIS   0x200
 
#define UART_MIS_OEMIS   0x400
 
#define UART_IMSC_CTSMIM   0x2
 
#define UART_IMSC_RXIM   0x10
 
#define UART_IMSC_TXIM   0x20
 
#define UART_IMSC_RTIM   0x40
 
#define UART_IMSC_FEIM   0x80
 
#define UART_IMSC_PEIM   0x100
 
#define UART_IMSC_BEIM   0x200
 
#define UART_IMSC_OEIM   0x400
 
#define UART_IFLS_TXSEL_1_8   0x0
 
#define UART_IFLS_TXSEL_2_8   0x1
 
#define UART_IFLS_TXSEL_4_8   0x2
 
#define UART_IFLS_TXSEL_6_8   0x3
 
#define UART_IFLS_TXSEL_7_8   0x4
 
#define UART_IFLS_RXSEL_1_8   0x0
 
#define UART_IFLS_RXSEL_2_8   0x8
 
#define UART_IFLS_RXSEL_4_8   0x10
 
#define UART_IFLS_RXSEL_6_8   0x18
 
#define UART_IFLS_RXSEL_7_8   0x20
 
#define UART1_BASE   (PERIPH_BASE + 0xB000)
 UART1 base address.