cpu_conf.h File Reference

LPC23XX CPU configuration. More...

Detailed Description

LPC23XX CPU configuration.

Author

baar

Version

$Revision$

Note

$Id$

Definition in file cpu_conf.h.

Go to the source code of this file.

Macros
#define	IRQ_API_INLINED   (1)
	 * More...
#define	PUF_SRAM_ATTRIBUTES   __attribute__((used, section(".noinit")))
	Attribute for memory sections required by SRAM PUF.
#define	NUM_HEAPS   (4)
	The CPU has 4 blocks of SRAM at different addresses. More...
#define	BACKUP_RAM   __attribute__((section(".backup.bss")))
	Memory marked with this attribute is retained during deep sleep and initialized with 0 on cold boot.
#define	BACKUP_RAM_DATA   __attribute__((section(".backup.data")))
	Memory marked with this attribute is retained during deep sleep and initialized with user provided data on cold boot.
#define	PERIPH_FLASHPAGE_CUSTOM_PAGESIZES
	lpc23xx has non-uniform pages
#define	CPU_FLASH_BASE   (0x0U)
	FLASH base address.

Stdlib configuration
#define	__FOPEN_MAX__   4
#define	__FILENAME_MAX__   12

Kernel configuration
#define	THREAD_EXTRA_STACKSIZE_PRINTF   (512)
#define	THREAD_STACKSIZE_DEFAULT   (1024)
#define	THREAD_STACKSIZE_IDLE   (160)

Pthread configuration
#define	CONFIG_PTHREAD_REAPER_BASE_STACKSIZE   (2*THREAD_STACKSIZE_IDLE)

Compiler specifics
#define	CC_CONF_INLINE   inline
#define	CC_CONF_USED   __attribute__((used))
#define	CC_CONF_NONNULL(...)   __attribute__((nonnull(__VA_ARGS__)))
#define	CC_CONF_WARN_UNUSED_RESULT   __attribute__((warn_unused_result))
#define	UND_STACKSIZE   (4)
	Stack size used for the undefined instruction interrupt stack.
#define	ABT_STACKSIZE   (4)
	Stack size used for the abort interrupt stack.
#define	ISR_STACKSIZE   (400)
	Stack size used for the interrupt (ISR) stack.
#define	FIQ_STACKSIZE   (64)
	Stack size used for the fast interrupt (FIQ) stack.
#define	SVC_STACKSIZE   (400)
	Stack size used for the supervisor mode (SVC) stack.
#define	USR_STACKSIZE   (4096)
	Stack size used for the user mode/kernel init stack.
#define	PERIPH_FLASHPAGE_NEEDS_FLASHPAGE_ADDR
	Flash page configuration.
#define	PERIPH_FLASHPAGE_NEEDS_FLASHPAGE_PAGE
#define	FLASHPAGE_NUMOF   (27)
#define	FLASHPAGE_WRITE_BLOCK_SIZE   (256)
#define	FLASHPAGE_WRITE_BLOCK_ALIGNMENT   (256)

Macro Definition Documentation

IRQ_API_INLINED

#define IRQ_API_INLINED   (1)

 *

This arch uses the inlined irq API. 

Definition at line 39 of file cpu_conf.h.

NUM_HEAPS

#define NUM_HEAPS   (4)

The CPU has 4 blocks of SRAM at different addresses.

(primary RAM, USB RAM, Ethernet RAM & Backup RAM)

Definition at line 128 of file cpu_conf.h.