periph_cpu_common.h

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/*
 * SPDX-FileCopyrightText: 2015 Freie Universität Berlin
 * SPDX-License-Identifier: LGPL-2.1-only
 */
 
#pragma once
 
#include <stdbool.h>
 
#include "bitarithm.h"
#include "compiler_hints.h"
#include "cpu.h"
#include "msp430_regs.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
#define HAVE_GPIO_T
typedef uint16_t gpio_t;
#define GPIO_UNDEF          (0xffff)
 
#define GPIO_PIN(x, y)      ((gpio_t)(((x & 0xff) << 8) | (1 << (y & 0x07))))
 
#define SPI_HWCS(x)         (SPI_CS_UNDEF)
 
#define TIMER_CHANNEL_NUMOF 7
 
#define RAMSTART    0x200
 
#define HAVE_GPIO_FLANK_T       
typedef enum {
    GPIO_FALLING = 0xff,        
    GPIO_RISING  = 0x00,        
    GPIO_BOTH    = 0xab         
} gpio_flank_t;
enum {
    P1 = 1,                 
    P2 = 2,                 
    P3 = 3,                 
    P4 = 4,                 
    P5 = 5,                 
    P6 = 6,                 
};
 
#ifndef DOXYGEN
#define HAVE_GPIO_STATE_T
typedef enum {
    GPIO_INPUT,
    GPIO_OUTPUT_PUSH_PULL,
    GPIO_OUTPUT_OPEN_DRAIN,     
    GPIO_OUTPUT_OPEN_SOURCE,    
    GPIO_USED_BY_PERIPHERAL,    
    GPIO_DISCONNECT             = GPIO_INPUT,
} gpio_state_t;
 
#define HAVE_GPIO_SLEW_T
typedef enum {
    GPIO_SLEW_SLOWEST = 0,
    GPIO_SLEW_SLOW = 0,
    GPIO_SLEW_FAST = 0,
    GPIO_SLEW_FASTEST = 0,
} gpio_slew_t;
 
#define HAVE_GPIO_PULL_STRENGTH_T
typedef enum {
    GPIO_PULL_WEAKEST = 0,
    GPIO_PULL_WEAK = 0,
    GPIO_PULL_STRONG = 0,
    GPIO_PULL_STRONGEST = 0
} gpio_pull_strength_t;
 
#define HAVE_GPIO_DRIVE_STRENGTH_T
typedef enum {
    GPIO_DRIVE_WEAKEST = 0,
    GPIO_DRIVE_WEAK = 0,
    GPIO_DRIVE_STRONG = 0,
    GPIO_DRIVE_STRONGEST = 0
} gpio_drive_strength_t;
#endif /* !DOXYGEN */
 
void gpio_periph_mode(gpio_t pin, bool enable);
 
extern uint32_t msp430_dco_freq;
 
typedef enum {
    MAIN_CLOCK_SOURCE_DCOCLK       = SELM_0,
    MAIN_CLOCK_SOURCE_XT2CLK       = SELM_2,
    MAIN_CLOCK_SOURCE_LFXT1CLK     = SELM_3,
} msp430_main_clock_source_t;
 
typedef enum {
    SUBMAIN_CLOCK_SOURCE_DCOCLK        = 0,
    SUBMAIN_CLOCK_SOURCE_XT2CLK        = SELS,
    SUBMAIN_CLOCK_SOURCE_LFXT1CLK      = SELS,
} msp430_submain_clock_source_t;
 
typedef enum {
    MAIN_CLOCK_DIVIDE_BY_1      = DIVM_0,
    MAIN_CLOCK_DIVIDE_BY_2      = DIVM_1,
    MAIN_CLOCK_DIVIDE_BY_4      = DIVM_2,
    MAIN_CLOCK_DIVIDE_BY_8      = DIVM_3,
} msp430_main_clock_divider_t;
 
typedef enum {
    SUBMAIN_CLOCK_DIVIDE_BY_1   = DIVS_0,
    SUBMAIN_CLOCK_DIVIDE_BY_2   = DIVS_1,
    SUBMAIN_CLOCK_DIVIDE_BY_4   = DIVS_2,
    SUBMAIN_CLOCK_DIVIDE_BY_8   = DIVS_3,
} msp430_submain_clock_divider_t;
 
typedef enum {
    AUXILIARY_CLOCK_DIVIDE_BY_1   = DIVA_0,
    AUXILIARY_CLOCK_DIVIDE_BY_2   = DIVA_1,
    AUXILIARY_CLOCK_DIVIDE_BY_4   = DIVA_2,
    AUXILIARY_CLOCK_DIVIDE_BY_8   = DIVA_3,
} msp430_auxiliary_clock_divider_t;
 
typedef struct {
    uint32_t target_dco_frequency;
    uint32_t lfxt1_frequency;
    uint32_t xt2_frequency;
    msp430_main_clock_source_t main_clock_source;
    msp430_submain_clock_source_t submain_clock_source;
    msp430_main_clock_divider_t main_clock_divier;
    msp430_submain_clock_divider_t submain_clock_divier;
    msp430_auxiliary_clock_divider_t auxiliary_clock_divier;
    bool has_r_osc;
    bool has_xt2;
} msp430_clock_params_t;
 
typedef enum {
    TIMER_CLOCK_SOURCE_TXCLK = TXSSEL_TXCLK,            
    TIMER_CLOCK_SOURCE_AUXILIARY_CLOCK = TXSSEL_ACLK,   
    TIMER_CLOCK_SOURCE_SUBMAIN_CLOCK = TXSSEL_SMCLK,    
    TIMER_CLOCK_SOURCE_INCLK = TXSSEL_INCLK,            
} msp430_timer_clock_source_t;
 
typedef enum {
    MSP430_CLOCK_SUBMAIN,                               
    MSP430_CLOCK_AUXILIARY,                             
    MSP430_CLOCK_NUMOF,                                 
} msp430_clock_t;
 
typedef struct {
    msp430_timer_t *timer;                         
    REG16 *irq_flags;
    msp430_timer_clock_source_t clock_source;   
} timer_conf_t;
 
extern msp430_port_p1_p2_t PORT_1;
extern msp430_port_p1_p2_t PORT_2;
extern msp430_port_p3_p6_t PORT_3;
extern msp430_port_p3_p6_t PORT_4;
extern msp430_port_p3_p6_t PORT_5;
extern msp430_port_p3_p6_t PORT_6;
 
extern msp430_timer_t TIMER_A;
 
extern REG16 TIMER_A_IRQFLAGS;
 
extern REG16 TIMER_B_IRQFLAGS;
 
extern msp430_timer_t TIMER_B;
void default_clock_init(void);
 
void clock_init(void);
 
uint32_t PURE msp430_submain_clock_freq(void);
 
uint32_t PURE msp430_auxiliary_clock_freq(void);
 
void msp430_clock_acquire(msp430_clock_t clock);
 
void msp430_clock_release(msp430_clock_t clock);
 
#ifdef __cplusplus
}
#endif