cpu_common.h
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1 /*
2  * SPDX-FileCopyrightText: 2020 Koen Zandberg <koen@bergzand.net>
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
20 #include <stdint.h>
21 
22 #include "irq_arch.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
33 void riscv_init(void);
34 
38 void riscv_fpu_init(void);
39 
43 void riscv_irq_init(void);
44 
50 static inline uintptr_t cpu_get_caller_pc(void)
51 {
52  /* This function must exist else RIOT won't compile */
53  return 0;
54 }
55 
62 static inline __attribute__((always_inline))
63 void cpu_reg_enable_bits(volatile uint32_t *reg, uint32_t mask)
64 {
65  __atomic_fetch_or(reg, mask, __ATOMIC_RELAXED);
66 }
67 
74 static inline __attribute__((always_inline))
75 void cpu_reg_disable_bits(volatile uint32_t *reg, uint32_t mask)
76 {
77  __atomic_fetch_and(reg, ~mask, __ATOMIC_RELAXED);
78 }
79 
80 #ifdef __cplusplus
81 }
82 #endif
83 
cpu_get_caller_pc
static uintptr_t cpu_get_caller_pc(void)
Gets the last instruction's address.
Definition: cpu_common.h:50
cpu_reg_enable_bits
static void cpu_reg_enable_bits(volatile uint32_t *reg, uint32_t mask)
Convenience function to set bit flags in a register.
Definition: cpu_common.h:63
riscv_init
void riscv_init(void)
Initialize rv32i specific core parts of the CPU.
riscv_fpu_init
void riscv_fpu_init(void)
Enable the rv32i FPU when present.
cpu_reg_disable_bits
static void cpu_reg_disable_bits(volatile uint32_t *reg, uint32_t mask)
Convenience function to clear bit flags in a register.
Definition: cpu_common.h:75
riscv_irq_init
void riscv_irq_init(void)
Initialization of the interrupt controller.
irq_arch.h
Implementation of the kernels irq interface.