vectors_cortexm.h
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1 /*
2  * SPDX-FileCopyrightText: 2015 Freie Universität Berlin
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #ifdef __cplusplus
19 extern "C" {
20 #endif
21 
22 #include "cpu_conf.h"
23 
28 #define WEAK_DEFAULT __attribute__((weak,alias("dummy_handler")))
29 
37 #define ISR_VECTOR(x) __attribute__((used,section(".vectors." # x )))
38 
45 #define CPU_NONISR_EXCEPTIONS (15)
46 
50 typedef void (*isr_t)(void);
51 
55 typedef struct {
56  void* _estack;
57  isr_t vectors[CPU_NONISR_EXCEPTIONS];
58 } cortexm_base_t;
59 
70 void reset_handler_default(void);
71 
79 void nmi_handler(void);
80 
88 void hard_fault_default(void);
89 
90 /* The following four exceptions are only present for Cortex-M3 and -M4 CPUs */
91 #if defined(CPU_CORE_CORTEX_M3) || defined(CPU_CORE_CORTEX_M4) || \
92  defined(CPU_CORE_CORTEX_M4F) || defined(CPU_CORE_CORTEX_M7)
99 void mem_manage_default(void);
100 
106 void bus_fault_default(void);
107 
115 void usage_fault_default(void);
116 
123 void debug_mon_default(void);
124 #endif
125 
134 void dummy_handler_default(void);
135 
136 #ifdef __cplusplus
137 }
138 #endif
139 
cortexm_base_t
Structure of Cortex-M basic vector table.
Definition: vectors_cortexm.h:55
cortexm_base_t::_estack
void * _estack
exception stack pointer
Definition: vectors_cortexm.h:56
hard_fault_default
void hard_fault_default(void)
Hard fault exception handler.
isr_t
void(* isr_t)(void)
All ISR functions have this type.
Definition: vectors_cortexm.h:50
reset_handler_default
void reset_handler_default(void)
This function is the default entry point after a system reset.
nmi_handler
void nmi_handler(void)
Non-maskable interrupt handler.
CPU_NONISR_EXCEPTIONS
#define CPU_NONISR_EXCEPTIONS
Number of Cortex-M non-ISR exceptions.
Definition: vectors_cortexm.h:45
dummy_handler_default
void dummy_handler_default(void)
Default handler used as weak alias for not implemented ISR vectors.