Memory layout of GPIO control register in IO bank 0. More...
Memory layout of GPIO control register in IO bank 0.
Definition at line 376 of file periph_cpu.h.
#include <periph_cpu.h>
Data Fields | |
| uint32_t | function_select: 5 |
| select GPIO function | |
| uint32_t | __pad0__: 3 |
| 3 bits reserved for future use | |
| uint32_t | output_override: 2 |
| output value override | |
| uint32_t | __pad1__: 2 |
| 2 bits reserved for future use | |
| uint32_t | output_enable_override: 2 |
| output enable override | |
| uint32_t | __pad2__: 2 |
| 2 bits reserved for future use | |
| uint32_t | input_override: 2 |
| input value override | |
| uint32_t | __pad3__: 10 |
| 10 bits reserved for future use | |
| uint32_t | irq_override: 2 |
| interrupt inversion override | |
| uint32_t | __pad4__: 2 |
| 2 bits reserved for future use | |