21 #include "periph_cpu_common.h" 
   31 #define PERIPH_SPI_NEEDS_INIT_CS 
   32 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE 
   33 #define PERIPH_SPI_NEEDS_TRANSFER_REG 
   34 #define PERIPH_SPI_NEEDS_TRANSFER_REGS 
   40 #define CPUID_LEN           (16U) 
   46 #define RTT_MAX_VALUE       (0xffffffff) 
   47 #define RTT_CLOCK_FREQUENCY (CHIP_FREQ_XTAL_32K)           
   48 #define RTT_MIN_FREQUENCY   (1)  
   49 #define RTT_MAX_FREQUENCY   (RTT_CLOCK_FREQUENCY)          
   59 #define ADC_NUMOF           (16U) 
   72 #define DAC_NUMOF           (2U) 
   79 #define HAVE_SPI_MODE_T 
   92 #define HAVE_SPI_CLK_T 
  108 #define HAVE_ADC_RES_T 
adc_res_t
Possible ADC resolution settings.
 
@ ADC_RES_16BIT
ADC resolution: 16 bit.
 
@ ADC_RES_8BIT
ADC resolution: 8 bit.
 
@ ADC_RES_14BIT
ADC resolution: 14 bit.
 
@ ADC_RES_6BIT
ADC resolution: 6 bit.
 
@ ADC_RES_10BIT
ADC resolution: 10 bit.
 
@ ADC_RES_12BIT
ADC resolution: 12 bit.
 
@ SPI_MODE_0
CPOL=0, CPHA=0.
 
@ SPI_MODE_2
CPOL=1, CPHA=0.
 
@ SPI_MODE_1
CPOL=0, CPHA=1.
 
@ SPI_MODE_3
CPOL=1, CPHA=1.
 
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
 
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
 
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
 
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
 
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
 
spi_mode_t
Support SPI modes.
 
gpio_mux_t
Available MUX values for configuring a pin's alternate function.
 
PWM channel configuration.
 
uint8_t hwchan
the HW channel used for a logical channel
 
SPI device configuration.
 
gpio_mux_t mux
pin MUX setting
 
uint8_t id
corresponding ID of that module
 
Spi * dev
SPI module to use.
 
gpio_t clk
pin mapped to the CLK line