periph_conf.h
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1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  * 2016 Inria
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
24 #ifndef PERIPH_CONF_H
25 #define PERIPH_CONF_H
26 
27 #include <stdint.h>
28 
29 #include "cpu.h"
30 #include "periph_cpu.h"
31 
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35 
67 #define CLOCK_USE_PLL (1)
68 
69 #if CLOCK_USE_PLL
70 /* edit these values to adjust the PLL output frequency */
71 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
72 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
73 /* generate the actual used core clock frequency */
74 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
75 #else
76 /* edit this value to your needs */
77 #define CLOCK_DIV (1U)
78 /* generate the actual core clock frequency */
79 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
80 #endif
87 static const tc32_conf_t timer_config[] = {
88  { /* Timer 0 - System Clock */
89  .dev = TC3,
90  .irq = TC3_IRQn,
91  .pm_mask = PM_APBCMASK_TC3,
92  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
93 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
94  .gclk_src = SAM0_GCLK_1MHZ,
95 #else
96  .gclk_src = SAM0_GCLK_MAIN,
97 #endif
98  .flags = TC_CTRLA_MODE_COUNT16,
99  },
100  { /* Timer 1 */
101  .dev = TC4,
102  .irq = TC4_IRQn,
103  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
104  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
105 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
106  .gclk_src = SAM0_GCLK_1MHZ,
107 #else
108  .gclk_src = SAM0_GCLK_MAIN,
109 #endif
110  .flags = TC_CTRLA_MODE_COUNT32,
111  }
112 };
113 
114 #define TIMER_0_MAX_VALUE 0xffff
115 
116 /* interrupt function name mapping */
117 #define TIMER_0_ISR isr_tc3
118 #define TIMER_1_ISR isr_tc4
119 
120 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
127 static const uart_conf_t uart_config[] = {
128  {
129  .dev = &SERCOM5->USART,
130  .rx_pin = GPIO_PIN(PB,23),
131  .tx_pin = GPIO_PIN(PB,22),
132 #ifdef MODULE_PERIPH_UART_HW_FC
133  .rts_pin = GPIO_UNDEF,
134  .cts_pin = GPIO_UNDEF,
135 #endif
136  .mux = GPIO_MUX_D,
137  .rx_pad = UART_PAD_RX_3,
138  .tx_pad = UART_PAD_TX_2,
139  .flags = UART_FLAG_NONE,
140  .gclk_src = SAM0_GCLK_MAIN,
141  },
142  {
143  .dev = &SERCOM0->USART,
144  .rx_pin = GPIO_PIN(PA,11),
145  .tx_pin = GPIO_PIN(PA,10),
146 #ifdef MODULE_PERIPH_UART_HW_FC
147  .rts_pin = GPIO_UNDEF,
148  .cts_pin = GPIO_UNDEF,
149 #endif
150  .mux = GPIO_MUX_C,
151  .rx_pad = UART_PAD_RX_3,
152  .tx_pad = UART_PAD_TX_2,
153  .flags = UART_FLAG_NONE,
154  .gclk_src = SAM0_GCLK_MAIN,
155  }
156 };
157 
158 /* interrupt function name mapping */
159 #define UART_0_ISR isr_sercom5
160 #define UART_1_ISR isr_sercom0
161 
162 #define UART_NUMOF ARRAY_SIZE(uart_config)
169 #define PWM_0_EN 1
170 #define PWM_1_EN 1
171 
172 #if PWM_0_EN
173 /* PWM0 channels */
174 static const pwm_conf_chan_t pwm_chan0_config[] = {
175  /* GPIO pin, MUX value, TCC channel */
176  { GPIO_PIN(PA, 8), GPIO_MUX_E, 0 },
177  { GPIO_PIN(PA, 9), GPIO_MUX_E, 1 },
178 };
179 #endif
180 #if PWM_1_EN
181 /* PWM1 channels */
182 static const pwm_conf_chan_t pwm_chan1_config[] = {
183  /* GPIO pin, MUX value, TCC channel */
184  { GPIO_PIN(PA, 6), GPIO_MUX_E, 0 },
185  { GPIO_PIN(PA, 7), GPIO_MUX_E, 1 },
186 };
187 #endif
188 
189 /* PWM device configuration */
190 static const pwm_conf_t pwm_config[] = {
191 #if PWM_0_EN
192  {TCC_CONFIG(TCC0), pwm_chan0_config, ARRAY_SIZE(pwm_chan0_config), SAM0_GCLK_MAIN},
193 #endif
194 #if PWM_1_EN
195  {TCC_CONFIG(TCC1), pwm_chan1_config, ARRAY_SIZE(pwm_chan1_config), SAM0_GCLK_MAIN},
196 #endif
197 };
198 
199 /* number of devices that are actually defined */
200 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
208 /* ADC Default values */
209 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
210 
211 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
212 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
213 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
214 
215 static const adc_conf_chan_t adc_channels[] = {
216  /* port, pin, muxpos */
217  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA02 }, /* A0 */
218  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB08 }, /* A1 */
219  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB09 }, /* A2 */
220  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA04 }, /* A3 */
221  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA05 }, /* A4 */
222  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PB02 }, /* A5 */
223 };
224 
225 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
232 static const spi_conf_t spi_config[] = {
233  {
234  .dev = &SERCOM4->SPI,
235  .miso_pin = GPIO_PIN(PA, 12),
236  .mosi_pin = GPIO_PIN(PB, 10),
237  .clk_pin = GPIO_PIN(PB, 11),
238  .miso_mux = GPIO_MUX_D,
239  .mosi_mux = GPIO_MUX_D,
240  .clk_mux = GPIO_MUX_D,
241  .miso_pad = SPI_PAD_MISO_0,
242  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
243  .gclk_src = SAM0_GCLK_MAIN,
244  },
245  {
246  .dev = &SERCOM1->SPI,
247  .miso_pin = GPIO_PIN(PA, 19),
248  .mosi_pin = GPIO_PIN(PA, 16),
249  .clk_pin = GPIO_PIN(PA, 17),
250  .miso_mux = GPIO_MUX_C,
251  .mosi_mux = GPIO_MUX_C,
252  .clk_mux = GPIO_MUX_C,
253  .miso_pad = SPI_PAD_MISO_3,
254  .mosi_pad = SPI_PAD_MOSI_0_SCK_1,
255  .gclk_src = SAM0_GCLK_MAIN,
256  }
257 };
258 
259 #define SPI_NUMOF ARRAY_SIZE(spi_config)
267 static const i2c_conf_t i2c_config[] = {
268  {
269  .dev = &(SERCOM3->I2CM),
270  .speed = I2C_SPEED_FAST,
271  .scl_pin = GPIO_PIN(PA, 23),
272  .sda_pin = GPIO_PIN(PA, 22),
273  .mux = GPIO_MUX_C,
274  .gclk_src = SAM0_GCLK_MAIN,
275  .flags = I2C_FLAG_NONE
276  }
277 };
278 
279 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
286 #ifndef RTT_FREQUENCY
287 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
288 #endif
289 #define RTT_MIN_OFFSET (10U)
296 static const sam0_common_usb_config_t sam_usbdev_config[] = {
297  {
298  .dm = GPIO_PIN(PA, 24),
299  .dp = GPIO_PIN(PA, 25),
300  .d_mux = GPIO_MUX_G,
301  .device = &USB->DEVICE,
302  .gclk_src = SAM0_GCLK_MAIN,
303  }
304 };
307 #ifdef __cplusplus
308 }
309 #endif
310 
311 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
#define GPIO_UNDEF
Definition of a fitting UNDEF value.
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:40
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:222
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:83
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: periph_cpu.h:279
@ UART_PAD_RX_3
select pad 3
@ PB
port B
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_2
select pad 2
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_C
select peripheral function C
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK
#define ADC_INPUTCTRL_MUXPOS_PA05
Alias for PIN5.
Definition: periph_cpu.h:124
#define ADC_INPUTCTRL_MUXPOS_PB08
Alias for PIN2.
Definition: periph_cpu.h:121
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:76
#define ADC_INPUTCTRL_MUXPOS_PB02
Alias for PIN10.
Definition: periph_cpu.h:129
#define ADC_INPUTCTRL_MUXPOS_PB09
Alias for PIN3.
Definition: periph_cpu.h:122
#define ADC_INPUTCTRL_MUXPOS_PA04
Alias for PIN4.
Definition: periph_cpu.h:123
#define ADC_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:119
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:74
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
PWM channel configuration data structure.
PWM device configuration.
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:265
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219