periph_conf.h File Reference

Configuration of CPU peripherals for the Microchip SAM E51 Curiosity Nano board. More...

Detailed Description

Configuration of CPU peripherals for the Microchip SAM E51 Curiosity Nano board.

Author
Benjamin Valentin benja.nosp@m.min..nosp@m.valen.nosp@m.tin@.nosp@m.ml-pa.nosp@m..com

Definition in file periph_conf.h.

#include "periph_cpu.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Macros

#define USE_VREG_BUCK   (1)
 Enable the internal DC/DC converter The board is equipped with the necessary inductor.
 

desired core clock frequency

#define CLOCK_CORECLOCK   MHZ(120)
 

32kHz Oscillator configuration

#define EXTERNAL_OSC32_SOURCE   1
 
#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE   0
 

Timer peripheral configuration

#define TIMER_0_CHANNELS   2
 
#define TIMER_0_ISR   isr_tc0
 
#define TIMER_1_CHANNELS   2
 
#define TIMER_1_ISR   isr_tc2
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const tc32_conf_t timer_config []
 

CAN configuration

#define ISR_CAN0   isr_can0
 CAN 0 ISR configuration.
 
#define ISR_CAN1   isr_can1
 CAN 1 ISR configuration.
 
#define CAN_NUMOF   ARRAY_SIZE(candev_conf)
 Number of CAN interfaces.
 
static const can_conf_t candev_conf []
 Available CAN interfaces. More...
 

UART configuration

#define UART_0_ISR   isr_sercom5_2
 
#define UART_0_ISR_TX   isr_sercom5_0
 
#define UART_1_ISR   isr_sercom4_2
 
#define UART_1_ISR_TX   isr_sercom4_0
 
#define UART_2_ISR   isr_sercom0_2
 
#define UART_2_ISR_TX   isr_sercom0_0
 
#define UART_3_ISR   isr_sercom3_2
 
#define UART_3_ISR_TX   isr_sercom3_0
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_chan_t pwm_chan0_config []
 
static const pwm_conf_t pwm_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

I2C configuration

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

RTT configuration

#define RTT_FREQUENCY   (32768U)
 

ADC Configuration

#define ADC_GCLK_SRC   SAM0_GCLK_PERIPH
 clock used for ADC
 
#define ADC_PRESCALER   ADC_CTRLA_PRESCALER_DIV8
 
#define ADC_NEG_INPUT   ADC_INPUTCTRL_MUXNEG(0x18u)
 
#define ADC_REF_DEFAULT   ADC_REFCTRL_REFSEL_INTVCC1
 
#define ADC_NUMOF   ARRAY_SIZE(adc_channels)
 
static const adc_conf_chan_t adc_channels []
 

DAC configuration

#define DAC_CLOCK   SAM0_GCLK_TIMER
 
#define DAC_VREF   DAC_CTRLB_REFSEL_VREFPU
 

USB peripheral configuration

Pins are only routed to solder pads on the board, no connector populated

static const sam0_common_usb_config_t sam_usbdev_config []
 

Variable Documentation

◆ adc_channels

const adc_conf_chan_t adc_channels[]
static
Initial value:
= {
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA07, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA04, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB09, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA11, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA10, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB08, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB03, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA02, .dev = ADC0 },
{ .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB04, .dev = ADC1 },
{ .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB05, .dev = ADC1 },
{ .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB06, .dev = ADC1 },
{ .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB07, .dev = ADC1 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB01, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PB00, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA03, .dev = ADC0 },
}
#define ADC0_INPUTCTRL_MUXPOS_PA04
Alias for AIN4.
Definition: periph_cpu.h:130
#define ADC0_INPUTCTRL_MUXPOS_PA07
Alias for AIN7.
Definition: periph_cpu.h:133
#define ADC0_INPUTCTRL_MUXPOS_PA10
Alias for AIN10.
Definition: periph_cpu.h:136
#define ADC1_INPUTCTRL_MUXPOS_PB05
Alias for AIN7.
Definition: periph_cpu.h:150
#define ADC1_INPUTCTRL_MUXPOS_PB04
Alias for AIN6.
Definition: periph_cpu.h:149
#define ADC0_INPUTCTRL_MUXPOS_PB01
Alias for AIN13.
Definition: periph_cpu.h:139
#define ADC0_INPUTCTRL_MUXPOS_PB03
Alias for AIN15.
Definition: periph_cpu.h:141
#define ADC0_INPUTCTRL_MUXPOS_PB08
Alias for AIN2.
Definition: periph_cpu.h:128
#define ADC0_INPUTCTRL_MUXPOS_PA11
Alias for AIN11.
Definition: periph_cpu.h:137
#define ADC0_INPUTCTRL_MUXPOS_PB00
Alias for AIN12.
Definition: periph_cpu.h:138
#define ADC1_INPUTCTRL_MUXPOS_PB07
Alias for AIN9.
Definition: periph_cpu.h:152
#define ADC0_INPUTCTRL_MUXPOS_PA03
Alias for AIN1.
Definition: periph_cpu.h:127
#define ADC0_INPUTCTRL_MUXPOS_PB09
Alias for AIN3.
Definition: periph_cpu.h:129
#define ADC0_INPUTCTRL_MUXPOS_PA02
ADC pin aliases.
Definition: periph_cpu.h:126
#define ADC1_INPUTCTRL_MUXPOS_PB06
Alias for AIN8.
Definition: periph_cpu.h:151

Definition at line 310 of file periph_conf.h.

◆ candev_conf

const can_conf_t candev_conf[]
static
Initial value:
= {
{
.can = CAN0,
.rx_pin = GPIO_PIN(PA, 22),
.tx_pin = GPIO_PIN(PB, 23),
.gclk_src = SAM0_GCLK_PERIPH,
},
{
.can = CAN1,
.rx_pin = GPIO_PIN(PB, 15),
.tx_pin = GPIO_PIN(PB, 14),
.gclk_src = SAM0_GCLK_PERIPH,
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
@ PB
port B
@ PA
port A
#define SAM0_GCLK_PERIPH
12-48 MHz (DFLL) clock
Definition: periph_cpu.h:82

Available CAN interfaces.

Definition at line 93 of file periph_conf.h.

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = &SERCOM2->I2CM,
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PA, 13),
.sda_pin = GPIO_PIN(PA, 12),
.mux = GPIO_MUX_C,
.gclk_src = SAM0_GCLK_PERIPH,
.flags = I2C_FLAG_NONE
},
}
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ I2C_FLAG_NONE
No flags set.
@ GPIO_MUX_C
select peripheral function C

Definition at line 257 of file periph_conf.h.

◆ pwm_chan0_config

const pwm_conf_chan_t pwm_chan0_config[]
static
Initial value:
= {
{
.pin = GPIO_PIN(PA, 14),
.mux = GPIO_MUX_F,
.chan = 0,
},
}
@ GPIO_MUX_F
select peripheral function F

Definition at line 203 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.tim = TCC_CONFIG(TCC2),
.chan = pwm_chan0_config,
.chan_numof = ARRAY_SIZE(pwm_chan0_config),
.gclk_src = SAM0_GCLK_48MHZ,
},
}
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:83
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ SAM0_GCLK_48MHZ
48MHz clock
Definition: periph_cpu.h:73

Definition at line 213 of file periph_conf.h.

◆ sam_usbdev_config

const sam0_common_usb_config_t sam_usbdev_config[]
static
Initial value:
= {
{
.dm = GPIO_PIN(PA, 24),
.dp = GPIO_PIN(PA, 25),
.d_mux = GPIO_MUX_H,
.device = &USB->DEVICE,
.gclk_src = SAM0_GCLK_PERIPH,
}
}
@ GPIO_MUX_H
select peripheral function H

Definition at line 287 of file periph_conf.h.

◆ spi_config

const spi_conf_t spi_config[]
static
Initial value:
= {
{
.dev = &SERCOM1->SPI,
.miso_pin = GPIO_PIN(PA, 19),
.mosi_pin = GPIO_PIN(PA, 16),
.clk_pin = GPIO_PIN(PA, 27),
.miso_mux = GPIO_MUX_C,
.mosi_mux = GPIO_MUX_C,
.clk_mux = GPIO_MUX_C,
.miso_pad = SPI_PAD_MISO_3,
.mosi_pad = SPI_PAD_MOSI_0_SCK_1,
.gclk_src = SAM0_GCLK_PERIPH,
},
}
@ SPI_PAD_MISO_3
use pad 3 for MISO line
@ SPI_PAD_MOSI_0_SCK_1
use pad 0 for MOSI, pad 1 for SCK

Definition at line 230 of file periph_conf.h.

◆ timer_config

const tc32_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TC0,
.irq = TC0_IRQn,
.mclk = &MCLK->APBAMASK.reg,
.mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.gclk_src = SAM0_GCLK_TIMER,
.flags = TC_CTRLA_MODE_COUNT32,
},
{
.dev = TC2,
.irq = TC2_IRQn,
.mclk = &MCLK->APBBMASK.reg,
.mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
.gclk_id = TC2_GCLK_ID,
.gclk_src = SAM0_GCLK_TIMER,
.flags = TC_CTRLA_MODE_COUNT32,
}
}
@ SAM0_GCLK_TIMER
4/8MHz clock for timers
Definition: periph_cpu.h:71

Definition at line 56 of file periph_conf.h.