periph_conf.h
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1 /*
2  * Copyright (C) 2014-2015 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
22 #ifndef PERIPH_CONF_H
23 #define PERIPH_CONF_H
24 
25 #include <stdint.h>
26 
27 #include "cpu.h"
28 #include "periph_cpu.h"
29 
30 #ifdef __cplusplus
31 extern "C" {
32 #endif
33 
66 #define CLOCK_USE_PLL (1)
67 #define CLOCK_USE_XOSC32_DFLL (0)
68 /*
69  * 0: use XOSC32K (always 32.768kHz) to clock GCLK2
70  * 1: use OSCULP32K factory calibrated (~32.768kHz) to clock GCLK2
71  *
72  * OSCULP32K is factory calibrated to be around 32.768kHz but this values can
73  * be of by a couple off % points, so prefer XOSC32K as default configuration.
74  */
75 #define GEN2_ULP32K (0)
76 
77 #if CLOCK_USE_PLL
78 /* edit these values to adjust the PLL output frequency */
79 #define CLOCK_PLL_MUL (47U) /* must be >= 31 & <= 95 */
80 #define CLOCK_PLL_DIV (1U) /* adjust to your needs */
81 /* generate the actual used core clock frequency */
82 #define CLOCK_CORECLOCK (((CLOCK_PLL_MUL + 1) * 1000000U) / CLOCK_PLL_DIV)
83 #elif CLOCK_USE_XOSC32_DFLL
84  /* Settings for 32 kHz external oscillator and 48 MHz DFLL */
85 #define CLOCK_CORECLOCK (48000000U)
86 #define CLOCK_XOSC32K (32768UL)
87 #define CLOCK_8MHZ (1)
88 #else
89 /* edit this value to your needs */
90 #define CLOCK_DIV (1U)
91 /* generate the actual core clock frequency */
92 #define CLOCK_CORECLOCK (8000000 / CLOCK_DIV)
93 #endif
100 static const tc32_conf_t timer_config[] = {
101  { /* Timer 0 - System Clock */
102  .dev = TC3,
103  .irq = TC3_IRQn,
104  .pm_mask = PM_APBCMASK_TC3,
105  .gclk_ctrl = GCLK_CLKCTRL_ID_TCC2_TC3,
106 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
107  .gclk_src = SAM0_GCLK_1MHZ,
108 #else
109  .gclk_src = SAM0_GCLK_MAIN,
110 #endif
111  .flags = TC_CTRLA_MODE_COUNT16,
112  },
113  { /* Timer 1 */
114  .dev = TC4,
115  .irq = TC4_IRQn,
116  .pm_mask = PM_APBCMASK_TC4 | PM_APBCMASK_TC5,
117  .gclk_ctrl = GCLK_CLKCTRL_ID_TC4_TC5,
118 #if CLOCK_USE_PLL || CLOCK_USE_XOSC32_DFLL
119  .gclk_src = SAM0_GCLK_1MHZ,
120 #else
121  .gclk_src = SAM0_GCLK_MAIN,
122 #endif
123  .flags = TC_CTRLA_MODE_COUNT32,
124  }
125 };
126 
127 #define TIMER_0_MAX_VALUE 0xffff
128 
129 /* interrupt function name mapping */
130 #define TIMER_0_ISR isr_tc3
131 #define TIMER_1_ISR isr_tc4
132 
133 #define TIMER_NUMOF ARRAY_SIZE(timer_config)
140 static const uart_conf_t uart_config[] = {
141  {
142  .dev = &SERCOM0->USART,
143  .rx_pin = GPIO_PIN(PA,5),
144  .tx_pin = GPIO_PIN(PA,4),
145 #ifdef MODULE_PERIPH_UART_HW_FC
146  .rts_pin = GPIO_PIN(PA,6),
147  .cts_pin = GPIO_PIN(PA,7),
148 #endif
149  .mux = GPIO_MUX_D,
150  .rx_pad = UART_PAD_RX_1,
151 #ifdef MODULE_PERIPH_UART_HW_FC
152  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
153 #else
154  .tx_pad = UART_PAD_TX_0,
155 #endif
156  .flags = UART_FLAG_NONE,
157  .gclk_src = SAM0_GCLK_MAIN,
158  },
159  {
160  .dev = &SERCOM5->USART,
161  .rx_pin = GPIO_PIN(PA,23),
162  .tx_pin = GPIO_PIN(PA,22),
163 #ifdef MODULE_PERIPH_UART_HW_FC
164  .rts_pin = GPIO_PIN(PB,22),
165  .cts_pin = GPIO_PIN(PB,23),
166 #endif
167  .mux = GPIO_MUX_D,
168  .rx_pad = UART_PAD_RX_1,
169 #ifdef MODULE_PERIPH_UART_HW_FC
170  .tx_pad = UART_PAD_TX_0_RTS_2_CTS_3,
171 #else
172  .tx_pad = UART_PAD_TX_0,
173 #endif
174  .flags = UART_FLAG_NONE,
175  .gclk_src = SAM0_GCLK_MAIN,
176  }
177 };
178 
179 /* interrupt function name mapping */
180 #define UART_0_ISR isr_sercom0
181 #define UART_1_ISR isr_sercom5
182 
183 #define UART_NUMOF ARRAY_SIZE(uart_config)
190 #define PWM_0_EN 1
191 #define PWM_1_EN 1
192 
193 #if PWM_0_EN
194 /* PWM0 channels */
195 static const pwm_conf_chan_t pwm_chan0_config[] = {
196  /* GPIO pin, MUX value, TCC channel */
197  { .pin = GPIO_PIN(PA, 6), .mux = GPIO_MUX_E, .chan = 0 },
198  { .pin = GPIO_PIN(PA, 7), .mux = GPIO_MUX_E, .chan = 1 },
199 };
200 #endif
201 #if PWM_1_EN
202 /* PWM1 channels */
203 static const pwm_conf_chan_t pwm_chan1_config[] = {
204  /* GPIO pin, MUX value, TCC channel */
205  { .pin = GPIO_PIN(PA, 16), .mux = GPIO_MUX_F, .chan = 0 },
206  { .pin = GPIO_PIN(PA, 18), .mux = GPIO_MUX_F, .chan = 2 },
207  { .pin = GPIO_PIN(PA, 19), .mux = GPIO_MUX_F, .chan = 3 },
208 };
209 #endif
210 
211 /* PWM device configuration */
212 static const pwm_conf_t pwm_config[] = {
213 #if PWM_0_EN
214  {
215  .tim = TCC_CONFIG(TCC1),
216  .chan = pwm_chan0_config,
217  .chan_numof = ARRAY_SIZE(pwm_chan0_config),
218  .gclk_src = SAM0_GCLK_MAIN,
219  },
220 #endif
221 #if PWM_1_EN
222  {
223  .tim = TCC_CONFIG(TCC0),
224  .chan = pwm_chan1_config,
225  .chan_numof = ARRAY_SIZE(pwm_chan1_config),
226  .gclk_src = SAM0_GCLK_MAIN,
227  },
228 #endif
229 };
230 
231 /* number of devices that are actually defined */
232 #define PWM_NUMOF ARRAY_SIZE(pwm_config)
239 static const spi_conf_t spi_config[] = {
240  {
241  .dev = &SERCOM4->SPI,
242  .miso_pin = GPIO_PIN(PC, 19),
243  .mosi_pin = GPIO_PIN(PB, 30),
244  .clk_pin = GPIO_PIN(PC, 18),
245  .miso_mux = GPIO_MUX_F,
246  .mosi_mux = GPIO_MUX_F,
247  .clk_mux = GPIO_MUX_F,
248  .miso_pad = SPI_PAD_MISO_0,
249  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
250  .gclk_src = SAM0_GCLK_MAIN,
251 #ifdef MODULE_PERIPH_DMA
252  .tx_trigger = SERCOM4_DMAC_ID_TX,
253  .rx_trigger = SERCOM4_DMAC_ID_RX,
254 #endif
255  },
256  {
257  .dev = &SERCOM5->SPI,
258  .miso_pin = GPIO_PIN(PB, 2),
259  .mosi_pin = GPIO_PIN(PB, 22),
260  .clk_pin = GPIO_PIN(PB, 23),
261  .miso_mux = GPIO_MUX_D,
262  .mosi_mux = GPIO_MUX_D,
263  .clk_mux = GPIO_MUX_D,
264  .miso_pad = SPI_PAD_MISO_0,
265  .mosi_pad = SPI_PAD_MOSI_2_SCK_3,
266  .gclk_src = SAM0_GCLK_MAIN,
267 #ifdef MODULE_PERIPH_DMA
268  .tx_trigger = SERCOM5_DMAC_ID_TX,
269  .rx_trigger = SERCOM5_DMAC_ID_RX,
270 #endif
271  }
272 };
273 
274 #define SPI_NUMOF ARRAY_SIZE(spi_config)
281 static const i2c_conf_t i2c_config[] = {
282  {
283  .dev = &(SERCOM3->I2CM),
284  .speed = I2C_SPEED_NORMAL,
285  .scl_pin = GPIO_PIN(PA, 17),
286  .sda_pin = GPIO_PIN(PA, 16),
287  .mux = GPIO_MUX_D,
288  .gclk_src = SAM0_GCLK_MAIN,
289  .flags = I2C_FLAG_NONE
290  }
291 };
292 #define I2C_NUMOF ARRAY_SIZE(i2c_config)
299 #ifndef RTT_FREQUENCY
300 #define RTT_FREQUENCY (32768U) /* in Hz. For changes see `rtt.c` */
301 #endif
302 #define RTT_MIN_OFFSET (10U)
310 /* ADC Default values */
311 #define ADC_PRESCALER ADC_CTRLB_PRESCALER_DIV512
312 
313 #define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG_GND
314 #define ADC_GAIN_FACTOR_DEFAULT ADC_INPUTCTRL_GAIN_1X
315 #define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INT1V
316 
317 static const adc_conf_chan_t adc_channels[] = {
318  /* port, pin, muxpos */
319  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA06 }, /* EXT1, pin 3 */
320  { .inputctrl = ADC_INPUTCTRL_MUXPOS_PA07 }, /* EXT1, pin 4 */
321 };
322 
323 #define ADC_NUMOF ARRAY_SIZE(adc_channels)
330 static const sam0_common_usb_config_t sam_usbdev_config[] = {
331  {
332  .dm = GPIO_PIN(PA, 24),
333  .dp = GPIO_PIN(PA, 25),
334  .d_mux = GPIO_MUX_G,
335  .device = &USB->DEVICE,
336  .gclk_src = SAM0_GCLK_MAIN,
337  }
338 };
340 #ifdef __cplusplus
341 }
342 #endif
343 
344 #endif /* PERIPH_CONF_H */
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
static const uart_conf_t uart_config[]
UART configuration.
Definition: periph_conf.h:39
static const spi_conf_t spi_config[]
SPI configuration.
Definition: periph_conf.h:97
static const i2c_conf_t i2c_config[]
I2C configuration.
Definition: periph_conf.h:69
static const timer_conf_t timer_config[]
All timers on board.
Definition: periph_conf.h:40
static const pwm_conf_t pwm_config[]
Actual PWM configuration.
Definition: periph_conf.h:222
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:83
static const gpio_t adc_channels[]
Static array with declared ADC channels.
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ UART_PAD_RX_1
select pad 1
@ PB
port B
@ PC
port C
@ PA
port A
@ I2C_FLAG_NONE
No flags set.
@ SPI_PAD_MISO_0
use pad 0 for MISO line
@ UART_FLAG_NONE
No flags set.
@ UART_PAD_TX_0_RTS_2_CTS_3
TX is pad 0, on top RTS on pad 2 and CTS on pad 3.
@ UART_PAD_TX_0
select pad 0
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ GPIO_MUX_E
select peripheral function E
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_G
select peripheral function G
@ GPIO_MUX_F
select peripheral function F
@ SPI_PAD_MOSI_2_SCK_3
use pad 2 for MOSI, pad 3 for SCK
@ SAM0_GCLK_1MHZ
1 MHz clock for xTimer
Definition: periph_cpu.h:76
#define ADC_INPUTCTRL_MUXPOS_PA07
Alias for PIN7.
Definition: periph_cpu.h:126
#define ADC_INPUTCTRL_MUXPOS_PA06
Alias for PIN6.
Definition: periph_cpu.h:125
#define SAM0_GCLK_MAIN
120 MHz main clock
Definition: periph_cpu.h:74
ADC Channel Configuration.
I2C configuration structure.
Definition: periph_cpu.h:299
TWI_t * dev
Pointer to hardware module registers.
Definition: periph_cpu.h:300
PWM channel configuration data structure.
gpio_t pin
GPIO pin.
PWM device configuration.
tc_tcc_cfg_t tim
timer configuration
USB peripheral parameters.
SPI device configuration.
Definition: periph_cpu.h:337
SPI_t * dev
pointer to the used SPI device
Definition: periph_cpu.h:338
Timer device configuration.
TC0_t * dev
Pointer to the used as Timer device.
Definition: periph_cpu.h:265
UART device configuration.
Definition: periph_cpu.h:218
USART_t * dev
pointer to the used UART device
Definition: periph_cpu.h:219