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periph_cpu_common.h
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1 /*
2  * Copyright (C) 2016 Leon George
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_COMMON_H
20 #define PERIPH_CPU_COMMON_H
21 
22 #include "cpu.h"
23 
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27 
31 #define CPUID_ADDR (&FCFG->MAC_BLE_0)
35 #define CPUID_LEN (16U)
36 
41 #define PROVIDES_PM_SET_LOWEST_CORTEXM
44 #ifndef DOXYGEN
48 #define HAVE_GPIO_MODE_T
49 typedef enum {
50  GPIO_IN = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_OFF),
51  GPIO_IN_PD = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_DOWN),
52  GPIO_IN_PU = (IOCFG_INPUT_ENABLE | IOCFG_PULLCTL_UP),
56 } gpio_mode_t;
57 
61 #define HAVE_GPIO_FLANK_T
62 typedef enum {
66 } gpio_flank_t;
67 
71 #define GPIO_PIN(x, y) (((x) & 0) | (y))
72 
73 /*
74  * @brief Invalid UART mode mask
75  *
76  * This mask is also used to force data_bits_t to be uint32_t type
77  * since it may be assigned a uint32_t variable in uart_mode
78  */
79 #define UART_INVALID_MODE (0x8000000)
80 
85 #define HAVE_UART_PARITY_T
86 typedef enum {
87  UART_PARITY_NONE = 0,
88  UART_PARITY_EVEN = (UART_LCRH_PEN | UART_LCRH_EPS),
89  UART_PARITY_ODD = UART_LCRH_PEN,
99 #define HAVE_UART_DATA_BITS_T
100 typedef enum {
101  UART_DATA_BITS_5 = UART_LCRH_WLEN_5,
102  UART_DATA_BITS_6 = UART_LCRH_WLEN_6,
103  UART_DATA_BITS_7 = UART_LCRH_WLEN_7,
104  UART_DATA_BITS_8 = UART_LCRH_WLEN_8
112 #define HAVE_UART_STOP_BITS_T
113 typedef enum {
114  UART_STOP_BITS_1 = 0,
115  UART_STOP_BITS_2 = UART_LCRH_STP2,
123 typedef struct {
124  uart_regs_t *regs;
125  int tx_pin;
126  int rx_pin;
127 #ifdef MODULE_PERIPH_UART_HW_FC
128  int rts_pin;
129  int cts_pin;
130 #endif
131  int intn;
132 } uart_conf_t;
141 typedef struct {
142  uint8_t cfg;
143  uint8_t chn;
144 } timer_conf_t;
145 
156 #define TIMER_CHANNEL_NUMOF 2
157 
158 #define PERIPH_I2C_NEED_READ_REG
159 #define PERIPH_I2C_NEED_READ_REGS
160 #define PERIPH_I2C_NEED_WRITE_REG
161 #define PERIPH_I2C_NEED_WRITE_REGS
162 
163 #endif /* ifndef DOXYGEN */
164 
165 #ifdef __cplusplus
166 }
167 #endif
168 
169 #endif /* PERIPH_CPU_COMMON_H */
@ GPIO_OUT
select GPIO MASK as output
Definition: periph_cpu.h:165
@ GPIO_IN
select GPIO MASK as input
Definition: periph_cpu.h:164
#define IOCFG_EDGEDET_BOTH
edge detection on both edges
#define IOCFG_IOMODE_OPEN_DRAIN
open drain
#define IOCFG_PULLCTL_DOWN
pull down
#define IOCFG_EDGEDET_RISING
edge detection on rising edge
#define IOCFG_PULLCTL_UP
pull up
#define IOCFG_PULLCTL_OFF
no IO pull
#define IOCFG_EDGEDET_FALLING
edge detection on falling edge
gpio_mode_t
Available pin modes.
Definition: periph_cpu.h:91
@ GPIO_FALLING
emit interrupt on falling flank
@ GPIO_RISING
emit interrupt on rising flank
@ GPIO_BOTH
not supported -> random value
@ GPIO_OD
configure as output in open-drain mode without pull resistor
Definition: gpio.h:124
@ GPIO_IN_PU
configure as input with pull-up resistor
Definition: gpio.h:122
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
Definition: gpio.h:126
@ GPIO_IN_PD
configure as input with pull-down resistor
Definition: gpio.h:121
@ UART_PARITY_SPACE
space parity
Definition: periph_cpu.h:507
@ UART_PARITY_NONE
no parity
Definition: periph_cpu.h:503
@ UART_PARITY_EVEN
even parity
Definition: periph_cpu.h:504
@ UART_PARITY_ODD
odd parity
Definition: periph_cpu.h:505
@ UART_PARITY_MARK
mark parity
Definition: periph_cpu.h:506
@ UART_STOP_BITS_2
2 stop bits
Definition: periph_cpu.h:536
@ UART_STOP_BITS_1
1 stop bit
Definition: periph_cpu.h:535
@ UART_DATA_BITS_6
6 data bits
Definition: periph_cpu.h:520
@ UART_DATA_BITS_5
5 data bits
Definition: periph_cpu.h:519
@ UART_DATA_BITS_7
7 data bits
Definition: periph_cpu.h:521
@ UART_DATA_BITS_8
8 data bits
Definition: periph_cpu.h:522
gpio_flank_t
Enumeration of supported GPIO flanks.
uart_parity_t
Definition of possible parity modes.
Definition: periph_cpu.h:502
uart_stop_bits_t
Definition of possible stop bits lengths.
Definition: periph_cpu.h:534
#define UART_INVALID_MODE
Invalid UART mode mask.
Definition: periph_cpu.h:493
uart_data_bits_t
Definition of possible data bits lengths in a UART frame.
Definition: periph_cpu.h:518
Timer device configuration.
Definition: periph_cpu.h:264
UART device configuration.
Definition: periph_cpu.h:218
UART component registers.