cpu_i2c.h
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1 /*
2  * Copyright (C) 2016 Freie Universität Berlin
3  * 2017 OTA keys S.A.
4  *
5  * This file is subject to the terms and conditions of the GNU Lesser
6  * General Public License v2.1. See the file LICENSE in the top level
7  * directory for more details.
8  */
9 
21 #ifndef PERIPH_CPU_I2C_H
22 #define PERIPH_CPU_I2C_H
23 
24 #include <stdint.h>
25 
26 #include "cpu.h"
27 #include "periph/cpu_gpio.h"
28 
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
32 
38 #define PERIPH_I2C_NEED_READ_REG
40 #define PERIPH_I2C_NEED_WRITE_REG
42 #define PERIPH_I2C_NEED_READ_REGS
43 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
44  defined(CPU_FAM_STM32L1) || defined(CPU_FAM_STM32F4) || \
45  defined(CPU_FAM_STM32MP1)
47 #define PERIPH_I2C_NEED_WRITE_REGS
48 #endif
51 #ifndef DOXYGEN
56 #define HAVE_I2C_SPEED_T
57 typedef enum {
58 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
59  defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \
60  defined(CPU_FAM_STM32MP1)
62 #endif
65 #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
66  defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
67  defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32WB) || \
68  defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32G0) || \
69  defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32U5) || \
70  defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0)
72 #endif
73 } i2c_speed_t;
75 #endif /* ndef DOXYGEN */
76 
80 typedef struct {
81  I2C_TypeDef *dev;
82  i2c_speed_t speed;
83  gpio_t scl_pin;
84  gpio_t sda_pin;
85 #ifndef CPU_FAM_STM32F1
88 #endif
89  uint8_t bus;
90  uint32_t rcc_mask;
91 #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
92  defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32G0) || \
93  defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L4) || \
94  defined(CPU_FAM_STM32L5) || defined(CPU_FAM_STM32WB) || \
95  defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WL) || \
96  defined(CPU_FAM_STM32C0)
97  uint32_t rcc_sw_mask;
98 #endif
99 #if defined(CPU_FAM_STM32F1) || defined(CPU_FAM_STM32F2) || \
100  defined(CPU_FAM_STM32F4) || defined(CPU_FAM_STM32L1) || \
101  defined(CPU_FAM_STM32MP1)
102  uint32_t clk;
103 #endif
104  uint8_t irqn;
105 } i2c_conf_t;
106 
107 #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
108  defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32L0) || \
109  defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \
110  defined(CPU_FAM_STM32G0) || defined(CPU_FAM_STM32G4) || \
111  defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WB) || \
112  defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0)
116 typedef struct {
117  uint8_t presc;
118  uint8_t scll;
119  uint8_t sclh;
120  uint8_t sdadel;
121  uint8_t scldel;
122 } i2c_timing_param_t;
123 
137 static const i2c_timing_param_t timing_params[] = {
138  [ I2C_SPEED_NORMAL ] = {
139  .presc = 3,
140  .scll = 0x13, /* t_SCLL = 5.0us */
141  .sclh = 0xF, /* t_SCLH = 4.0us */
142  .sdadel = 0x2, /* t_SDADEL = 500ns */
143  .scldel = 0x4, /* t_SCLDEL = 1250ns */
144  },
145  [ I2C_SPEED_FAST ] = {
146  .presc = 1,
147  .scll = 0x9, /* t_SCLL = 1250ns */
148  .sclh = 0x3, /* t_SCLH = 500ns */
149  .sdadel = 0x2, /* t_SDADEL = 250ns */
150  .scldel = 0x3, /* t_SCLDEL = 500ns */
151  },
152  [ I2C_SPEED_FAST_PLUS ] = {
153  .presc = 0,
154  .scll = 0x4, /* t_SCLL = 312.5ns */
155  .sclh = 0x2, /* t_SCLH = 187.5ns */
156  .sdadel = 0x0, /* t_SDADEL = 0ns */
157  .scldel = 0x2, /* t_SCLDEL = 187.5ns */
158  }
159 };
160 #endif /* CPU_FAM_STM32F0 || CPU_FAM_STM32F3 || CPU_FAM_STM32F7 ||
161  CPU_FAM_STM32L0 || CPU_FAM_STM32L4 || CPU_FAM_STM32L5 ||
162  CPU_FAM_STM32G0 || CPU_FAM_STM32G4 || CPU_FAM_STM32U5 ||
163  CPU_FAM_STM32WB || CPU_FAM_STM32WL || CPU_FAM_STM32C0 */
164 
165 #if defined(CPU_FAM_STM32F0) || defined(CPU_FAM_STM32F3) || \
166  defined(CPU_FAM_STM32F7) || defined(CPU_FAM_STM32G0) || \
167  defined(CPU_FAM_STM32G4) || defined(CPU_FAM_STM32L0) || \
168  defined(CPU_FAM_STM32L4) || defined(CPU_FAM_STM32L5) || \
169  defined(CPU_FAM_STM32U5) || defined(CPU_FAM_STM32WB) || \
170  defined(CPU_FAM_STM32WL) || defined(CPU_FAM_STM32C0)
175 #define PERIPH_I2C_MAX_BYTES_PER_FRAME (256U)
176 #endif
177 
178 #ifdef __cplusplus
179 }
180 #endif
181 
182 #endif /* PERIPH_CPU_I2C_H */
i2c_speed_t
Definition: periph_cpu.h:276
GPIO CPU definitions for the STM32 family.
gpio_af_t
Override alternative GPIO mode options.
Definition: periph_cpu.h:166
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ I2C_SPEED_FAST_PLUS
fast plus mode: ~1000 kbit/s
Definition: periph_cpu.h:280
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition: periph_cpu.h:277
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: periph_cpu.h:279
I2C configuration structure.
Definition: periph_cpu.h:299
gpio_af_t scl_af
scl pin alternate function value
Definition: cpu_i2c.h:86
gpio_af_t sda_af
sda pin alternate function value
Definition: cpu_i2c.h:87
uint8_t bus
APB bus.
Definition: cpu_i2c.h:89
uint32_t rcc_mask
bit in clock enable register
Definition: cpu_i2c.h:90
uint8_t irqn
I2C event interrupt number.
Definition: cpu_i2c.h:104