- Generated on Mon Oct 20 2025 13:02:33 by
1.9.1
ESP CAN device configuration. More...
#include <can_esp.h>
Data Fields | |
| uint32_t | bitrate |
| Bitrate. | |
| gpio_t | tx_pin |
| CAN transceiver TX pin. More... | |
| gpio_t | rx_pin |
| CAN transceiver RX pin. More... | |
| CAN_TypeDef * | can |
| CAN device. | |
| uint32_t | rcc_mask |
| RCC mask to enable clock. | |
| gpio_af_t | af |
| Alternate pin function to use. | |
| bool | en_deep_sleep_wake_up |
| Enable deep-sleep wake-up interrupt. | |
| CAN_TypeDef * | can_master |
| Master CAN device. | |
| uint32_t | master_rcc_mask |
| Master device RCC mask. | |
| uint8_t | first_filter |
| First filter in the bank. More... | |
| uint8_t | nb_filters |
| Number of filters to use. More... | |
| uint8_t | tx_irqn |
| TX IRQ channel. | |
| uint8_t | rx0_irqn |
| RX0 IRQ channel. | |
| uint8_t | rx1_irqn |
| RX1 IRQ channel. | |
| uint8_t | sce_irqn |
| SCE IRQ channel. | |
| uint8_t | ttcm: 1 |
| Time triggered communication mode. | |
| uint8_t | abom: 1 |
| Automatic bus-off management. | |
| uint8_t | awum: 1 |
| Automatic wakeup mode. | |
| uint8_t | nart: 1 |
| No automatic retransmission. | |
| uint8_t | rflm: 1 |
| Receive FIFO locked mode. | |
| uint8_t | txfp: 1 |
| Transmit FIFO priority. | |
| uint8_t | lbkm: 1 |
| Loopback mode. | |
| uint8_t | silm: 1 |
| Silent mode. | |
| FDCAN_GlobalTypeDef * | can |
| CAN device. | |
| uint8_t | it0_irqn |
| Interrupt line 0 IRQ channel. | |
| uint8_t | it1_irqn |
| Interrupt line 1 IRQ channel. | |
| uint8_t can_conf_t::first_filter |
First filter in the bank.
For a master channel it must be 0. For a slave channel, it is used without checking with the master channel, beware bot to overwrite the master config.
Definition at line 105 of file candev_stm32.h.
| uint8_t can_conf_t::nb_filters |
Number of filters to use.
Must be less or equal to CAN_STM32_NB_FILTER - first_filter
Definition at line 108 of file candev_stm32.h.
1.9.1