cc26xx_cc13xx_gpt.h
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1 /*
2  * SPDX-FileCopyrightText: 2016 Leon George
3  * SPDX-License-Identifier: LGPL-2.1-only
4  */
5 
6 #pragma once
7 
18 #include "cc26xx_cc13xx.h"
19 
20 #ifdef __cplusplus
21 extern "C" {
22 #endif
23 
27 typedef struct {
56  reg32_t __reserved2[976];
59 } gpt_reg_t;
60 
65 #define GPT0_BASE (0x40010000)
66 #define GPT1_BASE (0x40011000)
67 #define GPT2_BASE (0x40012000)
68 #define GPT3_BASE (0x40013000)
75 #define GPT0 ((gpt_reg_t *) (GPT0_BASE))
76 #define GPT1 ((gpt_reg_t *) (GPT1_BASE))
77 #define GPT2 ((gpt_reg_t *) (GPT2_BASE))
78 #define GPT3 ((gpt_reg_t *) (GPT3_BASE))
85 #define GPT_CFG_32T 0
86 #define GPT_CFG_32RTC 1
87 #define GPT_CFG_16T 4
88 
89 #define GPT_TXMR_TXMR_ONE_SHOT 0x00000001
90 #define GPT_TXMR_TXMR_PERIODIC 0x00000002
91 #define GPT_TXMR_TXMR_CAPTURE 0x00000003
92 #define GPT_TXMR_TXCM_EDGECNT 0x00000000
93 #define GPT_TXMR_TXCM_EDGETIME 0x00000004
94 #define GPT_TXMR_TXAMS_CAPTCOMP 0x00000000
95 #define GPT_TXMR_TXAMS_PWM 0x00000008
96 #define GPT_TXMR_TXCDIR_DOWN 0x00000000
97 #define GPT_TXMR_TXCDIR_UP 0x00000010 /* starts from 0 */
98 #define GPT_TXMR_TXMIE 0x00000020 /* match interrupt */
99 #define GPT_TXMR_TXWOT 0x00000040 /* wait on trigger from daisy */
100 #define GPT_TXMR_TXSNAPS 0x00000080
101 #define GPT_TXMR_TXILD_CLOCK 0x00000000 /* interrupt loac: update TXPR or TXR */
102 #define GPT_TXMR_TXILD_TIMEOUT 0x00000100
103 #define GPT_TXMR_TXPWMIE 0x00000200
104 #define GPT_TXMR_TXMRSU 0x00000400
105 #define GPT_TXMR_TXPLO 0x00000800
106 #define GPT_TXMR_TXCIN 0x00001000
107 #define GPT_TXMR_TCACT_DIS 0x00000000
108 #define GPT_TXMR_TCACT_TGL_TO 0x00002000
109 #define GPT_TXMR_TCACT_CLR_TO 0x00004000
110 #define GPT_TXMR_TCACT_SET_TO 0x00006000
111 #define GPT_TXMR_TCACT_SET_NOW_TGL_TO 0x00008000
112 #define GPT_TXMR_TCACT_CLR_NOW_TGL_TO 0x0000a000
113 #define GPT_TXMR_TCACT_SET_NOW_CLR_TO 0x0000c000
114 #define GPT_TXMR_TCACT_CLR_NOW_SET_TO 0x0000e000
115 
116 #define GPT_CTL_TAEN 0x00000001
117 #define GPT_CTL_TASTALL 0x00000002
118 #define GPT_CTL_TAEVENT_POS 0x00000000
119 #define GPT_CTL_TAEVENT_NEG 0x00000004
120 #define GPT_CTL_TAEVENT_BOTH 0x0000000c
121 #define GPT_CTL_RTCEN 0x00000010
122 #define GPT_CTL_TAPWML_INV 0x00000040
123 #define GPT_CTL_TBEN 0x00000100 /* still need capture CFG */
124 #define GPT_CTL_TBSTALL 0x00000200
125 #define GPT_CTL_TBEVENT_POS 0x00000000
126 #define GPT_CTL_TBEVENT_NEG 0x00000400
127 #define GPT_CTL_TBEVENT_BOTH 0x00000c00
128 #define GPT_CTL_TBPWML_INV 0x00004000
129 
130 #define GPT_SYNC_SYNC1_A 0x00000001
131 #define GPT_SYNC_SYNC1_B 0x00000002
132 #define GPT_SYNC_SYNC2_A 0x00000004
133 #define GPT_SYNC_SYNC2_B 0x00000008
134 #define GPT_SYNC_SYNC3_A 0x00000010
135 #define GPT_SYNC_SYNC3_B 0x00000020
136 #define GPT_SYNC_SYNC4_A 0x00000040
137 #define GPT_SYNC_SYNC4_B 0x00000080
138 
139 #define GPT_IMR_TATOIM 0x00000001
140 #define GPT_IMR_CAMIM 0x00000002
141 #define GPT_IMR_CAEIM 0x00000004
142 #define GPT_IMR_RTCIM 0x00000008
143 #define GPT_IMR_TAMIM 0x00000010
144 #define GPT_IMR_DMAAIM 0x00000020
145 #define GPT_IMR_TBTOIM 0x00000100
146 #define GPT_IMR_CBMIM 0x00000200
147 #define GPT_IMR_CBEIM 0x00000400
148 #define GPT_IMR_TBMIM 0x00000800
149 #define GPT_IMR_DMABIM 0x00002000
150 #define GPT_IMR_WUMIS 0x00010000
151 
152 #define GPT_RIS_TATORIS 0x00000001
153 #define GPT_RIS_CAMRIS 0x00000002
154 #define GPT_RIS_CAERIS 0x00000004
155 #define GPT_RIS_RTCRIS 0x00000008
156 #define GPT_RIS_TAMRIS 0x00000010
157 #define GPT_RIS_TBTORIS 0x00000100
158 #define GPT_RIS_CBMRIS 0x00000200
159 #define GPT_RIS_CBERIS 0x00000400
160 #define GPT_RIS_TBMRIS 0x00000800
161 #define GPT_RIS_DMARIS 0x00002000
162 #define GPT_RIS_WURIS 0x00010000
163 
164 #define GPT_MIS_TATOMIS 0x00000001
165 #define GPT_MIS_CAMMIS 0x00000002
166 #define GPT_MIS_CAEMIS 0x00000004
167 #define GPT_MIS_RTCMIS 0x00000008
168 #define GPT_MIS_TAMMIS 0x00000010
169 #define GPT_MIS_TBTOMIS 0x00000100
170 #define GPT_MIS_CBMMIS 0x00000200
171 #define GPT_MIS_CBEMIS 0x00000400
172 #define GPT_MIS_TBMMIS 0x00000800
173 #define GPT_MIS_DMAMIS 0x00002000
174 #define GPT_MIS_WUMIS 0x00010000
175 
176 #define GPT_ICLR_TATOCINT 0x00000001
177 #define GPT_ICLR_CAMCINT 0x00000002
178 #define GPT_ICLR_CAECINT 0x00000004
179 #define GPT_ICLR_RTCCINT 0x00000008
180 #define GPT_ICLR_TAMCINT 0x00000010
181 #define GPT_ICLR_TBTOCINT 0x00000100
182 #define GPT_ICLR_CBMCINT 0x00000200
183 #define GPT_ICLR_CBECINT 0x00000400
184 #define GPT_ICLR_TBMCINT 0x00000800
185 #define GPT_ICLR_DMACINT 0x00002000
186 #define GPT_ICLR_WUCINT 0x00010000
187 
188 #define GPT_DMAEV_TATODMAEN 0x00000001
189 #define GPT_DMAEV_CAMDMAEN 0x00000002
190 #define GPT_DMAEV_CAEDMAEN 0x00000004
191 #define GPT_DMAEV_RTCDMAEN 0x00000008
192 #define GPT_DMAEV_TAMDMAEN 0x00000010
193 #define GPT_DMAEV_TBTODMAEN 0x00000100
194 #define GPT_DMAEV_CBMDMAEN 0x00000200
195 #define GPT_DMAEV_CBEDMAEN 0x00000400
196 #define GPT_DMAEV_TBMDMAEN 0x00000800
199 #define GPT_NUMOF 4
200 #define NUM_CHANNELS_PER_GPT 1
202 #ifdef __cplusplus
203 }
204 #endif
205 
CC26xx, CC13xx definitions.
volatile uint32_t reg32_t
Unsigned 32-bit register type.
Definition: cc26xx_cc13xx.h:36
GPT registers.
reg32_t TAR
timer A register
reg32_t SYNC
sync timers
reg32_t VERSION
config
reg32_t __reserved1
unused
reg32_t TBR
timer B register
reg32_t TAV
timer A value
reg32_t TAILR
timer A interval load register
reg32_t TBV
timer B value
reg32_t RIS
raw interrupt status
reg32_t ANDCCP
config
reg32_t TBPS
config
reg32_t TBPR
timer B pre-scale
reg32_t TBMATCHR
timer B match register
reg32_t TBPMR
timer B pre-scale match register
reg32_t CFG
config
reg32_t MIS
masked interrupt status
reg32_t TAMR
timer A mode
reg32_t TBILR
timer B interval load register
reg32_t TAPMR
timer A pre-scale match register
reg32_t TAPS
config
reg32_t TAPV
config
reg32_t TBMR
timer B mode
reg32_t TBPV
config
reg32_t DMAEV
config
reg32_t ICLR
interrupt clear
reg32_t RTCPD
config
reg32_t CTL
control
reg32_t IMR
interrupt mask register
reg32_t TAMATCHR
timer A match register
reg32_t TAPR
timer A pre-scale