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cc26xx_cc13xx_wdt.h
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/*
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* SPDX-FileCopyrightText: 2016 Leon George
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* SPDX-License-Identifier: LGPL-2.1-only
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*/
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#pragma once
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#include <
cc26xx_cc13xx.h
>
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#ifdef __cplusplus
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extern
"C"
{
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#endif
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typedef
struct
{
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reg32_t
LOAD
;
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reg32_t
VALUE
;
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reg32_t
CTL
;
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reg32_t
ICR
;
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reg32_t
RIS
;
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reg32_t
MIS
;
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reg32_t
__reserved1[0x100];
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reg32_t
TEST
;
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reg32_t
INT_CAUS
;
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reg32_t
__reserved2[0x1f9];
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reg32_t
LOCK
;
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}
wdt_regs_t
;
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#define WDT_BASE 0x40080000
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#define WDT ((wdt_regs_t *) (WDT_BASE))
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#ifdef __cplusplus
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}
/* end extern "C" */
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#endif
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cc26xx_cc13xx.h
CC26xx, CC13xx definitions.
reg32_t
volatile uint32_t reg32_t
Unsigned 32-bit register type.
Definition:
cc26xx_cc13xx.h:36
wdt_regs_t
WDT registers.
Definition:
cc26xx_cc13xx_wdt.h:25
wdt_regs_t::LOCK
reg32_t LOCK
lock
Definition:
cc26xx_cc13xx_wdt.h:36
wdt_regs_t::INT_CAUS
reg32_t INT_CAUS
interrupt cause test mode
Definition:
cc26xx_cc13xx_wdt.h:34
wdt_regs_t::CTL
reg32_t CTL
control
Definition:
cc26xx_cc13xx_wdt.h:28
wdt_regs_t::ICR
reg32_t ICR
interrupt clear
Definition:
cc26xx_cc13xx_wdt.h:29
wdt_regs_t::VALUE
reg32_t VALUE
current count value
Definition:
cc26xx_cc13xx_wdt.h:27
wdt_regs_t::LOAD
reg32_t LOAD
config
Definition:
cc26xx_cc13xx_wdt.h:26
wdt_regs_t::MIS
reg32_t MIS
masked interrupt status
Definition:
cc26xx_cc13xx_wdt.h:31
wdt_regs_t::TEST
reg32_t TEST
test mode
Definition:
cc26xx_cc13xx_wdt.h:33
wdt_regs_t::RIS
reg32_t RIS
raw interrupt status
Definition:
cc26xx_cc13xx_wdt.h:30
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