periph_conf.h File Reference

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_timer_tim5.h"
#include "cfg_usb_otg_hs_phy_fs.h"

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Peripheral MCU configuration for the STM32F429I-DISC1 board
Author Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr
#define	CONFIG_BOARD_HAS_LSE   1
#define	CONFIG_BOARD_HAS_HSE   1

DMA streams configuration
#define	DMA_0_ISR   isr_dma2_stream6
#define	DMA_1_ISR   isr_dma2_stream5
#define	DMA_NUMOF   ARRAY_SIZE(dma_config)
static const dma_conf_t	dma_config []

UART configuration
#define	UART_0_ISR   (isr_usart1)
#define	UART_NUMOF   ARRAY_SIZE(uart_config)
static const uart_conf_t	uart_config []

SPI configuration
#define	SPI_NUMOF   ARRAY_SIZE(spi_config)
static const spi_conf_t	spi_config []

I2C configuration
#define	I2C_0_ISR   isr_i2c3_ev
#define	I2C_NUMOF   ARRAY_SIZE(i2c_config)
static const i2c_conf_t	i2c_config []

FMC configuration
#define	FMC_BANK_NUMOF   ARRAY_SIZE(fmc_bank_config)
	Number of configured FMC banks.
static const fmc_conf_t	fmc_config
	FMC controller configuration.
static const fmc_bank_conf_t	fmc_bank_config []
	FMC Bank configuration. More...

Variable Documentation

dma_config

const dma_conf_t dma_config[]

static

Initial value:

= {
    { .stream = 14 },   
    { .stream = 13 },   
}

Definition at line 41 of file periph_conf.h.

fmc_bank_config

const fmc_bank_conf_t fmc_bank_config[]

static

FMC Bank configuration.

The board has a SDRAM IS42S16400J-7TL with 64 MBit on-board. It is organized in 4 banks of 1M x 16 bits each and connected to bank 6 at address 0xd0000000.

Definition at line 196 of file periph_conf.h.

i2c_config

const i2c_conf_t i2c_config[]

static

Initial value:

= {
    {
        .dev            = I2C3,
        .speed          = I2C_SPEED_NORMAL,
        .scl_pin        = GPIO_PIN(PORT_A, 8),
        .sda_pin        = GPIO_PIN(PORT_C, 9),
        .scl_af         = GPIO_AF4,
        .sda_af         = GPIO_AF4,
        .bus            = APB1,
        .rcc_mask       = RCC_APB1ENR_I2C3EN,
        .clk            = CLOCK_APB1,
        .irqn           = I2C3_EV_IRQn,
    }
}

Definition at line 111 of file periph_conf.h.

spi_config

const spi_conf_t spi_config[]

static

Initial value:

= {
    {
        .dev            = SPI5,
        .mosi_pin       = GPIO_PIN(PORT_F, 9),
        .miso_pin       = GPIO_PIN(PORT_F, 8),
        .sclk_pin       = GPIO_PIN(PORT_F, 7),
        .cs_pin         = GPIO_UNDEF,
        .mosi_af        = GPIO_AF5,
        .miso_af        = GPIO_AF5,
        .sclk_af        = GPIO_AF5,
        .cs_af          = GPIO_AF5,
        .rccmask        = RCC_APB2ENR_SPI5EN,
        .apbbus         = APB2,
 
 
 
 
 
 
    }
}

Definition at line 82 of file periph_conf.h.

uart_config

const uart_conf_t uart_config[]

static

Initial value:

= {
    {
        .dev        = USART1,
        .rcc_mask   = RCC_APB2ENR_USART1EN,
        .rx_pin     = GPIO_PIN(PORT_A, 10),
        .tx_pin     = GPIO_PIN(PORT_A, 9),
        .rx_af      = GPIO_AF7,
        .tx_af      = GPIO_AF7,
        .bus        = APB2,
        .irqn       = USART1_IRQn,
 
 
 
 
    }
}

Definition at line 56 of file periph_conf.h.