periph_conf.h File Reference

Peripheral MCU configuration for the nucleo-l552ze-q board. More...

Detailed Description

Peripheral MCU configuration for the nucleo-l552ze-q board.

Author

Alexandre Abadie alexa.nosp@m.ndre.nosp@m..abad.nosp@m.ie@i.nosp@m.nria..nosp@m.fr

Definition in file periph_conf.h.

#include "periph_cpu.h"
#include "clk_conf.h"
#include "cfg_i2c1_pb8_pb9.h"
#include "cfg_rtt_default.h"
#include "cfg_timer_tim5.h"

Include dependency graph for periph_conf.h:

Go to the source code of this file.

#define	CONFIG_BOARD_HAS_LSE   1

UART configuration
#define	UART_0_ISR   (isr_lpuart1)
#define	UART_1_ISR   (isr_usart3)
#define	UART_NUMOF   ARRAY_SIZE(uart_config)
static const uart_conf_t	uart_config []

SPI configuration
#define	SPI_NUMOF   ARRAY_SIZE(spi_config)
static const spi_conf_t	spi_config []

PWM configuration
To find appriopate device and channel find in the MCU datasheet table concerning "Alternate function AF0 to AF7" a text similar to TIM[X]_CH[Y], where: TIM[X] - is device, [Y] - describes used channel (indexed from 0), for example TIM2_CH1 is channel 0 in configuration structure (cc_chan - field), Port column in the table describes connected port. For Nucleo-L552ZE-Q this information is in the datasheet, Table 22, page 122.
#define	PWM_NUMOF   ARRAY_SIZE(pwm_config)
static const pwm_conf_t	pwm_config []

Variable Documentation

spi_config

const spi_conf_t spi_config[]

static

Initial value:

= {
    {
        .dev            = SPI1,
        .mosi_pin       = GPIO_PIN(PORT_A, 7),  
        .miso_pin       = GPIO_PIN(PORT_A, 6),  
        .sclk_pin       = GPIO_PIN(PORT_A, 5),  
        .cs_pin         = GPIO_UNDEF,
        .mosi_af        = GPIO_AF5,
        .miso_af        = GPIO_AF5,
        .sclk_af        = GPIO_AF5,
        .cs_af          = GPIO_AF5,
        .rccmask        = RCC_APB2ENR_SPI1EN,
        .apbbus         = APB2,
    },
}

Definition at line 78 of file periph_conf.h.

uart_config

const uart_conf_t uart_config[]

static

Initial value:

= {
    {
        .dev        = LPUART1,
        .rcc_mask   = RCC_APB1ENR2_LPUART1EN,
        .rx_pin     = GPIO_PIN(PORT_G, 8),
        .tx_pin     = GPIO_PIN(PORT_G, 7),
        .rx_af      = GPIO_AF8,
        .tx_af      = GPIO_AF8,
        .bus        = APB12,
        .irqn       = LPUART1_IRQn,
        .type       = STM32_LPUART,
        .clk_src    = 0, 
    },
    { 
        .dev        = USART3,
        .rcc_mask   = RCC_APB1ENR1_USART3EN,
        .rx_pin     = GPIO_PIN(PORT_D, 9),
        .tx_pin     = GPIO_PIN(PORT_D, 8),
        .rx_af      = GPIO_AF7,
        .tx_af      = GPIO_AF7,
        .bus        = APB1,
        .irqn       = USART3_IRQn,
        .type       = STM32_USART,
        .clk_src    = 0, 
    },
}

Definition at line 41 of file periph_conf.h.