cc26xx_cc13xx.h File Reference
CC26xx, CC13xx definitions. More...
Detailed Description
CC26xx, CC13xx definitions.
Definition in file cc26xx_cc13xx.h.
#include <stdint.h>#include <core_cm3.h>
Include dependency graph for cc26xx_cc13xx.h: This graph shows which files directly or indirectly include this file:Go to the source code of this file.
Data Structures | |
| struct | reg8_m4_t |
| Masked 8-bit register. More... | |
| struct | reg32_m16_t |
| Masked 32-bit register. More... | |
Macros | |
| #define | RCOSC48M_FREQ 48000000 |
| 48 MHz | |
| #define | RCOSC24M_FREQ 24000000 |
| 24 MHz | |
| #define | __MPU_PRESENT 1 |
| Configuration of the Cortex-M4 processor and core peripherals. More... | |
| #define | __NVIC_PRIO_BITS 3 |
| CC13x2 offers priority levels from 0..7. | |
| #define | __Vendor_SysTickConfig 0 |
| Set to 1 if different SysTick config is used. | |
| enum | IRQn { ResetHandler_IRQn = -15 , NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , MemoryManagement_IRQn = -12 , BusFault_IRQn = -11 , UsageFault_IRQn = -10 , SVCall_IRQn = - 5 , DebugMonitor_IRQn = - 4 , PendSV_IRQn = - 2 , SysTick_IRQn = - 1 , GPIO_PORT_A_IRQn = 0 , GPIO_PORT_B_IRQn = 1 , GPIO_PORT_C_IRQn = 2 , GPIO_PORT_D_IRQn = 3 , UART0_IRQn = 5 , UART1_IRQn = 6 , SSI0_IRQn = 7 , I2C_IRQn = 8 , ADC_IRQn = 14 , WDT_IRQn = 18 , GPTIMER_0A_IRQn = 19 , GPTIMER_0B_IRQn = 20 , GPTIMER_1A_IRQn = 21 , GPTIMER_1B_IRQn = 22 , GPTIMER_2A_IRQn = 23 , GPTIMER_2B_IRQn = 24 , ADC_CMP_IRQn = 25 , RF_RXTX_ALT_IRQn = 26 , RF_ERR_ALT_IRQn = 27 , SYS_CTRL_IRQn = 28 , FLASH_CTRL_IRQn = 29 , AES_ALT_IRQn = 30 , PKA_ALT_IRQn = 31 , SM_TIMER_ALT_IRQn = 32 , MAC_TIMER_ALT_IRQn = 33 , SSI1_IRQn = 34 , GPTIMER_3A_IRQn = 35 , GPTIMER_3B_IRQn = 36 , UDMA_IRQn = 46 , UDMA_ERR_IRQn = 47 , USB_IRQn = 140 , RF_RXTX_IRQn = 141 , RF_ERR_IRQn = 142 , AES_IRQn = 143 , PKA_IRQn = 144 , SM_TIMER_IRQn = 145 , MACTIMER_IRQn = 146 , PERIPH_COUNT_IRQn = (MACTIMER_IRQn + 1) , ResetHandler_IRQn = -15 , NonMaskableInt_IRQn = -14 , HardFault_IRQn = -13 , MemoryManagement_IRQn = -12 , BusFault_IRQn = -11 , UsageFault_IRQn = -10 , SVCall_IRQn = - 5 , DebugMonitor_IRQn = - 4 , PendSV_IRQn = - 2 , SysTick_IRQn = - 1 , EDGE_DETECT_IRQN = 0 , I2C_IRQN = 1 , RF_CPE1_IRQN = 2 , PKA_IRQN = 3 , AON_RTC_IRQN = 4 , UART0_IRQN = 5 , AON_AUX_SWEV0_IRQN = 6 , SSI0_IRQN = 7 , SSI1_IRQN = 8 , RF_CPE0_IRQN = 9 , RF_HW_IRQN = 10 , RF_CMD_ACK_IRQN = 11 , I2S_IRQN = 12 , AON_AUX_SWEV1_IRQN = 13 , WATCHDOG_IRQN = 14 , GPTIMER_0A_IRQN = 15 , GPTIMER_0B_IRQN = 16 , GPTIMER_1A_IRQN = 17 , GPTIMER_1B_IRQN = 18 , GPTIMER_2A_IRQN = 19 , GPTIMER_2B_IRQN = 20 , GPTIMER_3A_IRQN = 21 , GPTIMER_3B_IRQN = 22 , CRYPTO_IRQN = 23 , UDMA_IRQN = 24 , UDMA_ERR_IRQN = 25 , FLASH_CTRL_IRQN = 26 , SW0_IRQN = 27 , AUX_COMBO_IRQN = 28 , AON_PRG0_IRQN = 29 , PROG_IRQN = 30 , AUX_COMPA_IRQN = 31 , AUX_ADC_IRQN = 32 , TRNG_IRQN = 33 , IRQN_COUNT = (TRNG_IRQN + 1) } |
| Interrupt number definition. More... | |
| typedef volatile uint8_t | reg8_t |
| Unsigned 8-bit register type. | |
| typedef volatile uint16_t | reg16_t |
| Unsigned 16-bit register type. | |
| typedef volatile uint32_t | reg32_t |
| Unsigned 32-bit register type. | |
| typedef reg16_t | reg8_m8_t |
| Masked 8-bit register. | |
| typedef enum IRQn | IRQn_Type |
| Interrupt number definition. | |
| #define | FLASH_BASE 0x00000000 |
| CMSIS includes. More... | |
| #define | PERIPH_BASE 0x40000000 |
| Peripheral base address. | |
| #define | PERIPH_BASE_NONBUF 0x60000000 |
| Peripheral base address (nonbuf) | |
| #define | ROM_HARD_API_BASE 0x10000048 |
| ROM Hard-API base address. | |
| #define | ROM_API_TABLE ((uint32_t *) 0x10000180) |
| ROM API table. | |
| #define | ADI_DIR 0x00000000 |
| ADI master instruction offsets. | |
| #define | ADI_SET 0x00000010 |
| #define | ADI_CLR 0x00000020 |
| #define | ADI_MASK4B 0x00000040 |
| #define | ADI_MASK8B 0x00000060 |
| #define | ADI_MASK16B 0x00000080 |
