periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Kaspar Schleiser <kaspar@schleiser.de>
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef PERIPH_CPU_H
20 #define PERIPH_CPU_H
21 
22 #ifdef __cplusplus
23 extern "C" {
24 #endif
25 
26 #include <stdint.h>
27 #include "cpu.h"
28 
33 #define __IO volatile
40 #define PM_NUM_MODES (4)
46 typedef struct {
48  __IO uint32_t DIR;
50  uint32_t _reserved[3];
54  __IO uint32_t MASK;
58  __IO uint32_t PIN;
60  __IO uint32_t SET;
62  __IO uint32_t CLR;
63 } FIO_PORT_t;
64 
68 #define FIO_PORTS ((FIO_PORT_t*)FIO_BASE_ADDR)
69 
73 #define PINSEL ((__IO uint32_t *)(PINSEL_BASE_ADDR))
74 
78 #define PINMODE ((__IO uint32_t *)(PINSEL_BASE_ADDR + 0x40))
79 
86 int gpio_init_mux(unsigned pin, unsigned mux);
87 
91 #define GPIO_PIN(port, pin) (port<<5 | pin)
92 
93 #ifndef DOXYGEN
94 #define HAVE_GPIO_FLANK_T
95 typedef enum {
96  GPIO_FALLING = 1,
97  GPIO_RISING = 2,
98  GPIO_BOTH = 3
99 } gpio_flank_t;
100 #endif /* ifndef DOXYGEN */
101 
105 typedef struct {
106  lpc23xx_uart_t *dev;
107  uint8_t irq_prio_rx;
108  uint8_t pinsel_rx;
109  uint8_t pinsel_tx;
110  uint32_t pinsel_msk_rx;
111  uint32_t pinsel_msk_tx;
112 } uart_conf_t;
113 
117 typedef struct {
118  lpc23xx_spi_t *dev;
119  uint8_t pinsel_mosi;
120  uint8_t pinsel_miso;
121  uint8_t pinsel_clk;
122  uint32_t pinsel_msk_mosi;
123  uint32_t pinsel_msk_miso;
124  uint32_t pinsel_msk_clk;
125 } spi_conf_t;
126 
130 #define TIMER_CHANNEL_NUMOF (4U)
131 
135 #define PERIPH_TIMER_PROVIDES_SET
136 
141 #define PERIPH_SPI_NEEDS_INIT_CS
142 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
143 #define PERIPH_SPI_NEEDS_TRANSFER_REG
144 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
147 #ifndef DOXYGEN
152 #define HAVE_SPI_CLK_T
153 typedef enum {
154  SPI_CLK_100KHZ = 100,
155  SPI_CLK_400KHZ = 400,
156  SPI_CLK_1MHZ = 1000,
157  SPI_CLK_5MHZ = 5000,
158  SPI_CLK_10MHZ = 10000
159 } spi_clk_t;
161 #endif /* ndef DOXYGEN */
162 
173 #define DAC_NUMOF (1U)
174 
175 #ifndef DOXYGEN
180 #define HAVE_ADC_RES_T
181 typedef enum {
182  ADC_RES_16BIT = 0xff,
183  ADC_RES_14BIT = 0xfe,
184  ADC_RES_12BIT = 0xfd,
185  ADC_RES_10BIT = 0b000,
186  ADC_RES_9BIT = 0b001,
187  ADC_RES_8BIT = 0b010,
188  ADC_RES_7BIT = 0b011,
189  ADC_RES_6BIT = 0b100,
190  ADC_RES_5BIT = 0b101,
191  ADC_RES_4BIT = 0b110,
192  ADC_RES_3BIT = 0b111,
193 } adc_res_t;
195 #endif /* ndef DOXYGEN */
196 
200 typedef struct {
201  uint8_t chan;
202  uint8_t pinsel;
203  uint32_t pinsel_msk;
204 } adc_conf_t;
205 
206 #ifndef DOXYGEN
211 #define HAVE_I2C_SPEED_T
212 typedef enum {
213  I2C_SPEED_LOW = 10000,
214  I2C_SPEED_NORMAL = 100000,
215  I2C_SPEED_FAST = 400000,
216 } i2c_speed_t;
218 #endif /* ndef DOXYGEN */
219 
223 typedef struct {
224  lpc23xx_i2c_t *dev;
225  i2c_speed_t speed;
226  uint8_t irq_prio;
227  uint8_t pinsel_sda;
228  uint8_t pinsel_scl;
229  uint32_t pinsel_msk_sda;
230  uint32_t pinsel_msk_scl;
231 } i2c_conf_t;
232 
237 #define PERIPH_I2C_NEED_READ_REG
238 #define PERIPH_I2C_NEED_WRITE_REG
246 #if defined(MODULE_PERIPH_RTC) && !defined(RTC_NORMALIZE_COMPAT)
247 #define RTC_NORMALIZE_COMPAT (1)
248 #endif
251 #ifdef __cplusplus
252 }
253 #endif
254 
255 #endif /* PERIPH_CPU_H */
gpio_flank_t
Definition: periph_cpu.h:180
i2c_speed_t
Definition: periph_cpu.h:276
spi_clk_t
Definition: periph_cpu.h:352
void gpio_init_mux(gpio_t pin, uint8_t over, uint8_t sel, uint8_t func)
Configure an alternate function for the given pin.
gpio_t adc_conf_t
ADC configuration wrapper.
Definition: periph_cpu.h:337
adc_res_t
Possible ADC resolution settings.
Definition: adc.h:93
@ ADC_RES_16BIT
ADC resolution: 16 bit.
Definition: adc.h:99
@ ADC_RES_8BIT
ADC resolution: 8 bit.
Definition: adc.h:95
@ ADC_RES_14BIT
ADC resolution: 14 bit.
Definition: adc.h:98
@ ADC_RES_6BIT
ADC resolution: 6 bit.
Definition: adc.h:94
@ ADC_RES_10BIT
ADC resolution: 10 bit.
Definition: adc.h:96
@ ADC_RES_12BIT
ADC resolution: 12 bit.
Definition: adc.h:97
@ GPIO_FALLING
emit interrupt on falling flank
Definition: periph_cpu.h:109
@ GPIO_RISING
emit interrupt on rising flank
Definition: periph_cpu.h:110
@ GPIO_BOTH
emit interrupt on both flanks
Definition: periph_cpu.h:111
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ I2C_SPEED_LOW
low speed mode: ~10 kbit/s
Definition: periph_cpu.h:277
@ I2C_SPEED_FAST
fast mode: ~400 kbit/s
Definition: periph_cpu.h:279
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:357
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:356
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:354
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:355
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:353
#define __IO
LPC2387 MCU defines.
Definition: periph_cpu.h:33
Native CPU header.
Fast GPIO register definition struct.
Definition: periph_cpu.h:46
__IO uint32_t MASK
Set bits to ignore corresponding bits when accessing PIN, SET or CLR register of this port.
Definition: periph_cpu.h:54
__IO uint32_t SET
Output pins are set to high by setting the corresponding bit.
Definition: periph_cpu.h:60
__IO uint32_t DIR
Direction: Output if corresponding bit is set, otherwise input.
Definition: periph_cpu.h:48
__IO uint32_t PIN
The current state of each pin of this port is accessible here (regardless of direction): If bit is se...
Definition: periph_cpu.h:58
__IO uint32_t CLR
Output pins are set to low by setting the corresponding bit.
Definition: periph_cpu.h:62
uint8_t pinsel
PINSEL# of the ADC pin
Definition: periph_cpu.h:202
uint32_t pinsel_msk
PINSEL Mask for ADC pin.
Definition: periph_cpu.h:203
I2C configuration structure.
Definition: periph_cpu.h:299
uint32_t pinsel_msk_scl
SCL PINSEL Mask
Definition: periph_cpu.h:230
uint8_t pinsel_sda
PINSEL# of the SDA pin
Definition: periph_cpu.h:227
uint8_t pinsel_scl
PINSEL# of the SCL pin
Definition: periph_cpu.h:228
lpc23xx_i2c_t * dev
pointer to the I2C device
Definition: periph_cpu.h:224
uint8_t irq_prio
priority of the I2C IRQ
Definition: periph_cpu.h:226
uint32_t pinsel_msk_sda
SDA PINSEL Mask
Definition: periph_cpu.h:229
SPI device configuration.
Definition: periph_cpu.h:337
lpc23xx_spi_t * dev
pointer to the SPI device
Definition: periph_cpu.h:118
uint8_t pinsel_miso
PINSEL# of the MISO pin
Definition: periph_cpu.h:120
uint32_t pinsel_msk_clk
CLK PINSEL Mask
Definition: periph_cpu.h:124
uint8_t pinsel_clk
PINSEL# of the CLK pin
Definition: periph_cpu.h:121
uint8_t pinsel_mosi
PINSEL# of the MOSI pin
Definition: periph_cpu.h:119
uint32_t pinsel_msk_mosi
MOSI PINSEL Mask
Definition: periph_cpu.h:122
uint32_t pinsel_msk_miso
MISO PINSEL Mask
Definition: periph_cpu.h:123
UART device configuration.
Definition: periph_cpu.h:218
uint8_t pinsel_rx
PINSEL# of the RX pin
Definition: periph_cpu.h:108
lpc23xx_uart_t * dev
pointer to the UART device
Definition: periph_cpu.h:106
uint32_t pinsel_msk_tx
TX PINSEL Mask
Definition: periph_cpu.h:111
uint8_t pinsel_tx
PINSEL# of the TX pin
Definition: periph_cpu.h:109
uint8_t irq_prio_rx
priority of the RX IRQ
Definition: periph_cpu.h:107
uint32_t pinsel_msk_rx
RX PINSEL Mask
Definition: periph_cpu.h:110