periph_cpu_common.h File Reference

Common CPU specific definitions for all SAM3/SAM4x based CPUs. More...

Detailed Description

Common CPU specific definitions for all SAM3/SAM4x based CPUs.

Common CPU specific definitions for all SAM3/SAM4x based CPUs

Author
Dylan Laduranty dylan.nosp@m..lad.nosp@m.urant.nosp@m.y@me.nosp@m.sotic.nosp@m..com

Definition in file periph_cpu_common.h.

#include "cpu.h"
+ Include dependency graph for periph_cpu_common.h:

Go to the source code of this file.

Data Structures

struct  timer_conf_t
 Timer device configuration. More...
 
struct  uart_conf_t
 UART device configuration. More...
 
#define TIMER_CHANNEL_NUMOF   (1)
 We use one channel for each defined timer. More...
 
#define GPIO_MODE(io, pu, od)   (io | (pu << 1) | (od << 2))
 Generate GPIO mode bitfields. More...
 
enum  gpio_mux_t {
  GPIO_MUX_A = 0x0 , GPIO_MUX_B = 0x1 , GPIO_MUX_C = 0x2 , GPIO_MUX_D = 0x3 ,
  GPIO_MUX_E = 0x4 , GPIO_MUX_F = 0x5 , GPIO_MUX_G = 0x6 , GPIO_MUX_H = 0x7 ,
  GPIO_MUX_I = 0x8 , GPIO_MUX_J = 0x9 , GPIO_MUX_K = 0xa , GPIO_MUX_L = 0xb ,
  GPIO_MUX_M = 0xc , GPIO_MUX_N = 0xd , GPIO_MUX_DISABLED = 0xff , GPIO_MUX_A = 0 ,
  GPIO_MUX_B = 1
}
 GPIO mux configuration. More...
 
enum  { PA = 0 , PB = 1 , PC = 2 }
 Available ports on the SAM3/SAM4S based MCUs. More...
 
void gpio_init_mux (gpio_t pin, gpio_mux_t mux)
 Configure the given GPIO pin to be used with the given MUX setting. More...
 

Macro Definition Documentation

◆ GPIO_MODE

#define GPIO_MODE (   io,
  pu,
  od 
)    (io | (pu << 1) | (od << 2))

Generate GPIO mode bitfields.

We use 3 bit to determine the pin functions:

  • bit 0: in/out
  • bit 1: PU enable
  • bit 2: OD enable

Definition at line 56 of file periph_cpu_common.h.

◆ TIMER_CHANNEL_NUMOF

#define TIMER_CHANNEL_NUMOF   (1)

We use one channel for each defined timer.

While the peripheral provides three channels, the current interrupt flag handling leads to a race condition where calling timer_clear() on one channel can disable a pending flag for other channels. Until resolved, limit the peripheral to only one channel.

Definition at line 46 of file periph_cpu_common.h.

Enumeration Type Documentation

◆ anonymous enum

anonymous enum

Available ports on the SAM3/SAM4S based MCUs.

Enumerator
PA 

port A

PB 

port B

PC 

port C

Definition at line 92 of file periph_cpu_common.h.

◆ gpio_mux_t

enum gpio_mux_t

GPIO mux configuration.

Enumerator
GPIO_MUX_A 

select peripheral function A

GPIO_MUX_B 

select peripheral function B

GPIO_MUX_C 

select peripheral function C

GPIO_MUX_D 

select peripheral function D

GPIO_MUX_E 

select peripheral function E

GPIO_MUX_F 

select peripheral function F

GPIO_MUX_G 

select peripheral function G

GPIO_MUX_H 

select peripheral function H

GPIO_MUX_I 

select peripheral function I

GPIO_MUX_J 

select peripheral function J

GPIO_MUX_K 

select peripheral function K

GPIO_MUX_L 

select peripheral function L

GPIO_MUX_M 

select peripheral function M

GPIO_MUX_N 

select peripheral function N

GPIO_MUX_DISABLED 

Disable

GPIO_MUX_A 

alternate function A

GPIO_MUX_B 

alternate function B

Definition at line 80 of file periph_cpu_common.h.

Function Documentation

◆ gpio_init_mux()

void gpio_init_mux ( gpio_t  pin,
gpio_mux_t  mux 
)

Configure the given GPIO pin to be used with the given MUX setting.

Parameters
[in]pinGPIO pin to configure
[in]muxMUX setting to use