20 #ifndef PERIPH_CPU_COMMON_H
21 #define PERIPH_CPU_COMMON_H
33 #define GPIO_UNDEF (0xffffffff)
35 #define GPIO_PIN(x, y) (((uint32_t)PIOA + (x << 9)) | y)
46 #define TIMER_CHANNEL_NUMOF (1)
56 #define GPIO_MODE(io, pu, od) (io | (pu << 1) | (od << 2))
59 #define HAVE_GPIO_MODE_T
69 #define HAVE_GPIO_FLANK_T
@ GPIO_OUT
select GPIO MASK as output
@ GPIO_IN
select GPIO MASK as input
gpio_mode_t
Available pin modes.
unsigned int gpio_t
GPIO type identifier.
@ GPIO_FALLING
emit interrupt on falling flank
@ GPIO_RISING
emit interrupt on rising flank
@ GPIO_BOTH
not supported -> random value
@ GPIO_OD
configure as output in open-drain mode without pull resistor
@ GPIO_IN_PU
configure as input with pull-up resistor
@ GPIO_OD_PU
configure as output in open-drain mode with pull resistor enabled
@ GPIO_IN_PD
configure as input with pull-down resistor
gpio_flank_t
Enumeration of supported GPIO flanks.
void gpio_init_mux(gpio_t pin, gpio_mux_t mux)
Set up alternate function (PMUX setting) for a PORT pin.
gpio_mux_t
Available MUX values for configuring a pin's alternate function.
@ GPIO_MUX_D
select peripheral function D
@ GPIO_MUX_C
select peripheral function C
@ GPIO_MUX_A
select peripheral function A
@ GPIO_MUX_B
select peripheral function B
#define GPIO_MODE(io, pu, od)
Generate GPIO mode bitfields.
Timer device configuration.
uint8_t id_ch0
ID of the timer's first channel.
UART device configuration.
uint8_t pmc_id
bit in the PMC register of the device
Uart * dev
U(S)ART device used.