periph_conf.h File Reference

Configuration of CPU peripherals for the Microchip SAM E54 Xplained Pro board. More...

Detailed Description

Configuration of CPU peripherals for the Microchip SAM E54 Xplained Pro board.

Author
Benjamin Valentin benja.nosp@m.min..nosp@m.valen.nosp@m.tin@.nosp@m.ml-pa.nosp@m..com

Definition in file periph_conf.h.

#include "periph_cpu.h"
+ Include dependency graph for periph_conf.h:

Go to the source code of this file.

Macros

#define USE_VREG_BUCK   (1)
 Enable the internal DC/DC converter The board is equipped with the necessary inductor.
 
#define USE_XOSC_ONLY   (0)
 Use the external oscillator to source all fast clocks. More...
 

external Oscillator (XOSC1) configuration

#define XOSC1_FREQUENCY   MHZ(12)
 

desired core clock frequency

#define CLOCK_CORECLOCK   MHZ(120)
 

32kHz Oscillator configuration

#define EXTERNAL_OSC32_SOURCE   1
 
#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE   0
 

Timer peripheral configuration

#define TIMER_0_CHANNELS   2
 
#define TIMER_0_ISR   isr_tc0
 
#define TIMER_1_CHANNELS   2
 
#define TIMER_1_ISR   isr_tc2
 
#define TIMER_NUMOF   ARRAY_SIZE(timer_config)
 
static const tc32_conf_t timer_config []
 
#define AT6561_STBY_PIN   GPIO_PIN(PC, 13)
 ATA6561 STANDBY pin definition.
 

CAN configuration

#define ISR_CAN1   isr_can1
 CAN 1 configuration.
 
#define CAN_NUMOF   ARRAY_SIZE(candev_conf)
 Number of CAN interfaces.
 
static const can_conf_t candev_conf []
 Available CAN interfaces. More...
 

UART configuration

#define UART_0_ISR   isr_sercom2_2
 
#define UART_0_ISR_TX   isr_sercom2_0
 
#define UART_1_ISR   isr_sercom0_2
 
#define UART_1_ISR_TX   isr_sercom0_0
 
#define UART_2_ISR   isr_sercom5_2
 
#define UART_2_ISR_TX   isr_sercom5_0
 
#define UART_3_ISR   isr_sercom1_2
 
#define UART_3_ISR_TX   isr_sercom1_0
 
#define UART_NUMOF   ARRAY_SIZE(uart_config)
 
static const uart_conf_t uart_config []
 

PWM configuration

#define PWM_NUMOF   ARRAY_SIZE(pwm_config)
 
static const pwm_conf_chan_t pwm_chan0_config []
 
static const pwm_conf_t pwm_config []
 

SPI configuration

#define SPI_NUMOF   ARRAY_SIZE(spi_config)
 
static const spi_conf_t spi_config []
 

I2C configuration

#define I2C_NUMOF   ARRAY_SIZE(i2c_config)
 
static const i2c_conf_t i2c_config []
 

RTT configuration

#define RTT_FREQUENCY   (32768U)
 

ADC Configuration

#define ADC_GCLK_SRC   SAM0_GCLK_PERIPH
 clock used for ADC
 
#define ADC_PRESCALER   ADC_CTRLA_PRESCALER_DIV8
 
#define ADC_NEG_INPUT   ADC_INPUTCTRL_MUXNEG(0x18u)
 
#define ADC_REF_DEFAULT   ADC_REFCTRL_REFSEL_INTVCC1
 
#define ADC_NUMOF   ARRAY_SIZE(adc_channels)
 
static const adc_conf_chan_t adc_channels []
 

DAC configuration

#define DAC_CLOCK   SAM0_GCLK_TIMER
 
#define DAC_VREF   DAC_CTRLB_REFSEL_VREFPU
 

SDHC configuration

  This is entirely optional, but allows us to save a few bytes if only
  a single SDHC instance is used.
#define SDHC_DEV   SDHC1
 The SDHC instance to use.
 
#define SDHC_DEV_ISR   isr_sdhc1
 Interrupt service routing for SDHC1.
 
#define SDHC_CONFIG_NUMOF   1
 Number of configured SDHC devices.
 
static const sdhc_conf_t sdhc_config []
 SDHC devices. More...
 

USB peripheral configuration

static const sam0_common_usb_config_t sam_usbdev_config []
 

Ethernet peripheral configuration

static const sam0_common_gmac_config_t sam_gmac_config []
 

FREQM peripheral configuration

static const freqm_config_t freqm_config []
 

Macro Definition Documentation

◆ USE_XOSC_ONLY

#define USE_XOSC_ONLY   (0)

Use the external oscillator to source all fast clocks.

This allows us to use the buck voltage regulator for maximum power efficiency, but limits the maximum clock frequency to 12 MHz.

Definition at line 36 of file periph_conf.h.

Variable Documentation

◆ adc_channels

const adc_conf_chan_t adc_channels[]
static
Initial value:
= {
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA03, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA05, .dev = ADC0 },
{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA07, .dev = ADC0 }
}
#define ADC0_INPUTCTRL_MUXPOS_PA07
Alias for AIN7.
Definition: periph_cpu.h:133
#define ADC0_INPUTCTRL_MUXPOS_PA05
Alias for AIN5.
Definition: periph_cpu.h:131
#define ADC0_INPUTCTRL_MUXPOS_PA03
Alias for AIN1.
Definition: periph_cpu.h:127

Definition at line 365 of file periph_conf.h.

◆ candev_conf

const can_conf_t candev_conf[]
static
Initial value:
= {
{
.can = CAN1,
.rx_pin = GPIO_PIN(PB, 13),
.tx_pin = GPIO_PIN(PB, 12),
.gclk_src = SAM0_GCLK_PERIPH,
.enable_pin = AT6561_STBY_PIN,
.enable_pin_mode = GPIO_OUT,
.enable_pin_active_low = true,
}
}
#define GPIO_PIN(x, y)
Define a CPU specific GPIO pin generator macro.
Definition: periph_cpu.h:46
@ GPIO_OUT
select GPIO MASK as output
Definition: periph_cpu.h:165
#define AT6561_STBY_PIN
ATA6561 STANDBY pin definition.
Definition: periph_conf.h:113
@ PB
port B
#define SAM0_GCLK_PERIPH
12-48 MHz (DFLL) clock
Definition: periph_cpu.h:82

Available CAN interfaces.

Definition at line 121 of file periph_conf.h.

◆ freqm_config

const freqm_config_t freqm_config[]
static
Initial value:
= {
{
.pin = GPIO_PIN(PB, 17),
.gclk_src = SAM0_GCLK_32KHZ
}
}
#define SAM0_GCLK_32KHZ
32 kHz clock
Definition: periph_cpu.h:76

Definition at line 437 of file periph_conf.h.

◆ i2c_config

const i2c_conf_t i2c_config[]
static
Initial value:
= {
{
.dev = &(SERCOM3->I2CM),
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PA, 23),
.sda_pin = GPIO_PIN(PA, 22),
.mux = GPIO_MUX_C,
.gclk_src = SAM0_GCLK_PERIPH,
.flags = I2C_FLAG_NONE
},
{
.dev = &(SERCOM7->I2CM),
.speed = I2C_SPEED_NORMAL,
.scl_pin = GPIO_PIN(PD, 9),
.sda_pin = GPIO_PIN(PD, 8),
.mux = GPIO_MUX_C,
.gclk_src = SAM0_GCLK_PERIPH,
.flags = I2C_FLAG_NONE
}
}
@ I2C_SPEED_NORMAL
normal mode: ~100 kbit/s
Definition: periph_cpu.h:278
@ PA
port A
@ PD
port D
@ I2C_FLAG_NONE
No flags set.
@ GPIO_MUX_C
select peripheral function C

Definition at line 305 of file periph_conf.h.

◆ pwm_chan0_config

const pwm_conf_chan_t pwm_chan0_config[]
static
Initial value:
= {
{
.pin = GPIO_PIN(PC, 18),
.mux = GPIO_MUX_F,
.chan = 2
},
}
@ PC
port C
@ GPIO_MUX_F
select peripheral function F

Definition at line 217 of file periph_conf.h.

◆ pwm_config

const pwm_conf_t pwm_config[]
static
Initial value:
= {
{
.tim = TCC_CONFIG(TCC0),
.chan = pwm_chan0_config,
.chan_numof = ARRAY_SIZE(pwm_chan0_config),
.gclk_src = SAM0_GCLK_48MHZ,
},
}
#define ARRAY_SIZE(a)
Calculate the number of elements in a static array.
Definition: container.h:83
#define TCC_CONFIG(tim)
Static initializer for TCC timer configuration.
@ SAM0_GCLK_48MHZ
48MHz clock
Definition: periph_cpu.h:73

Definition at line 227 of file periph_conf.h.

◆ sam_gmac_config

const sam0_common_gmac_config_t sam_gmac_config[]
static
Initial value:
= {
{
.dev = GMAC,
.refclk = GPIO_PIN(PA, 14),
.txen = GPIO_PIN(PA, 17),
.txd0 = GPIO_PIN(PA, 18),
.txd1 = GPIO_PIN(PA, 19),
.crsdv = GPIO_PIN(PC, 20),
.rxd0 = GPIO_PIN(PA, 13),
.rxd1 = GPIO_PIN(PA, 12),
.rxer = GPIO_PIN(PA, 15),
.mdc = GPIO_PIN(PC, 11),
.mdio = GPIO_PIN(PC, 12),
.rst_pin = GPIO_PIN(PC, 21),
.int_pin = GPIO_PIN(PD, 12),
}
}

Definition at line 414 of file periph_conf.h.

◆ sam_usbdev_config

const sam0_common_usb_config_t sam_usbdev_config[]
static
Initial value:
= {
{
.dm = GPIO_PIN(PA, 24),
.dp = GPIO_PIN(PA, 25),
.d_mux = GPIO_MUX_H,
.device = &USB->DEVICE,
.gclk_src = SAM0_GCLK_PERIPH,
}
}
@ GPIO_MUX_H
select peripheral function H

Definition at line 342 of file periph_conf.h.

◆ sdhc_config

const sdhc_conf_t sdhc_config[]
static
Initial value:
= {
{
.sdhc = SDHC1,
.cd = GPIO_PIN(PD, 20),
.wp = GPIO_UNDEF,
},
}
#define GPIO_UNDEF
Definition of a fitting UNDEF value.

SDHC devices.

Definition at line 398 of file periph_conf.h.

◆ timer_config

const tc32_conf_t timer_config[]
static
Initial value:
= {
{
.dev = TC0,
.irq = TC0_IRQn,
.mclk = &MCLK->APBAMASK.reg,
.mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
.gclk_id = TC0_GCLK_ID,
.gclk_src = SAM0_GCLK_TIMER,
.flags = TC_CTRLA_MODE_COUNT32,
},
{
.dev = TC2,
.irq = TC2_IRQn,
.mclk = &MCLK->APBBMASK.reg,
.mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
.gclk_id = TC2_GCLK_ID,
.gclk_src = SAM0_GCLK_TIMER,
.flags = TC_CTRLA_MODE_COUNT32,
}
}
@ SAM0_GCLK_TIMER
4/8MHz clock for timers
Definition: periph_cpu.h:71

Definition at line 77 of file periph_conf.h.