periph_cpu.h
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1 /*
2  * Copyright (C) 2015 Freie Universität Berlin
3  *
4  * This file is subject to the terms and conditions of the GNU Lesser
5  * General Public License v2.1. See the file LICENSE in the top level
6  * directory for more details.
7  */
8 
19 #ifndef X1XX_PERIPH_CPU_H
20 #define X1XX_PERIPH_CPU_H
21 
22 #include <stdbool.h>
23 
24 #include "compiler_hints.h"
25 #include "periph_cpu_common.h"
26 #include "macros/units.h"
27 
28 #ifdef __cplusplus
29 extern "C" {
30 #endif
31 
35 #define USART_NUMOF 2
36 
41 #define USART_MIN_BR_SPI 2
42 
47 #define USART_MIN_BR_UART 3
48 
53 #define HAVE_SPI_MODE_T
62 typedef enum {
63  SPI_MODE_0 = (CKPH),
64  SPI_MODE_1 = 0,
65  SPI_MODE_2 = (CKPL | CKPH),
66  SPI_MODE_3 = (CKPL)
74 #define HAVE_SPI_CLK_T
78 typedef enum {
84 } spi_clk_t;
92 typedef struct {
95  uint8_t tx_irq_mask;
97  uint8_t rx_irq_mask;
99  uint8_t num;
101 
107 typedef enum {
112 
116 typedef struct {
118  uint8_t br0;
119  uint8_t br1;
120  uint8_t mctl;
122 
129 typedef struct {
131  uint8_t ctl;
133 
143 typedef struct {
152  uint8_t tx_enable_mask;
164  gpio_t rxd;
165  gpio_t txd;
167 
171 typedef struct {
173 } uart_conf_t;
174 
185 typedef struct {
194  uint8_t enable_mask;
195  gpio_t miso;
196  gpio_t mosi;
197  gpio_t sck;
199 
203 typedef struct {
205 } spi_conf_t;
206 
211 
216 
221 
226 
231 #define PERIPH_SPI_NEEDS_INIT_CS
232 #define PERIPH_SPI_NEEDS_TRANSFER_BYTE
233 #define PERIPH_SPI_NEEDS_TRANSFER_REG
234 #define PERIPH_SPI_NEEDS_TRANSFER_REGS
245 static inline void msp430_usart_enable_tx_irq(const msp430_usart_params_t *usart_conf)
246 {
247  usart_conf->sfr->IE |= usart_conf->tx_irq_mask;
248 }
249 
258 static inline void msp430_usart_enable_rx_irq(const msp430_usart_params_t *usart_conf)
259 {
260  usart_conf->sfr->IE |= usart_conf->rx_irq_mask;
261 }
262 
271 static inline void msp430_usart_disable_tx_irq(const msp430_usart_params_t *usart_conf)
272 {
273  usart_conf->sfr->IE &= ~(usart_conf->tx_irq_mask);
274 }
275 
284 static inline void msp430_usart_disable_rx_irq(const msp430_usart_params_t *usart_conf)
285 {
286  usart_conf->sfr->IE &= ~(usart_conf->rx_irq_mask);
287 }
288 
295 static inline bool msp430_usart_get_tx_irq_flag(const msp430_usart_params_t *usart_conf)
296 {
297  return usart_conf->sfr->IFG & usart_conf->tx_irq_mask;
298 }
299 
306 static inline bool msp430_usart_get_rx_irq_flag(const msp430_usart_params_t *usart_conf)
307 {
308  return usart_conf->sfr->IFG & usart_conf->rx_irq_mask;
309 }
310 
317 static inline bool msp430_usart_are_both_irq_flags_set(const msp430_usart_params_t *usart_conf)
318 {
319  const uint8_t mask = usart_conf->tx_irq_mask | usart_conf->rx_irq_mask;
320  return (usart_conf->sfr->IFG & mask) == mask;
321 }
322 
327 static inline void msp430_usart_clear_tx_irq_flag(const msp430_usart_params_t *usart_conf)
328 {
329  usart_conf->sfr->IFG &= ~(usart_conf->tx_irq_mask);
330 }
331 
336 static inline void msp430_usart_clear_rx_irq_flag(const msp430_usart_params_t *usart_conf)
337 {
338  usart_conf->sfr->IFG &= ~(usart_conf->rx_irq_mask);
339 }
340 
356  const msp430_usart_conf_t *conf,
357  uint8_t enable_mask);
358 
365 
386 msp430_usart_prescaler_t msp430_usart_prescale(uint32_t clock, uint16_t min_br);
387 #ifdef __cplusplus
388 }
389 #endif
390 
391 #endif /* X1XX_PERIPH_CPU_H */
spi_clk_t
Definition: periph_cpu.h:352
Common macros and compiler attributes/pragmas configuration.
@ SPI_MODE_0
CPOL=0, CPHA=0.
Definition: periph_cpu.h:44
@ SPI_MODE_2
CPOL=1, CPHA=0.
Definition: periph_cpu.h:46
@ SPI_MODE_1
CPOL=0, CPHA=1.
Definition: periph_cpu.h:45
@ SPI_MODE_3
CPOL=1, CPHA=1.
Definition: periph_cpu.h:47
@ SPI_CLK_10MHZ
drive the SPI bus with 10MHz
Definition: periph_cpu.h:357
@ SPI_CLK_5MHZ
drive the SPI bus with 5MHz
Definition: periph_cpu.h:356
@ SPI_CLK_400KHZ
drive the SPI bus with 400KHz
Definition: periph_cpu.h:354
@ SPI_CLK_1MHZ
drive the SPI bus with 1MHz
Definition: periph_cpu.h:355
@ SPI_CLK_100KHZ
drive the SPI bus with 100KHz
Definition: periph_cpu.h:353
spi_mode_t
Support SPI modes.
Definition: periph_cpu.h:43
const msp430_usart_spi_params_t usart1_as_spi
MSP430 x1xx USART1 in SPI configuration.
const msp430_usart_uart_params_t usart1_as_uart
MSP430 x1xx USART1 in UART configuration.
static void msp430_usart_clear_tx_irq_flag(const msp430_usart_params_t *usart_conf)
Clear the TX IRQ flag of the given USART.
Definition: periph_cpu.h:327
static void msp430_usart_enable_tx_irq(const msp430_usart_params_t *usart_conf)
Enable the TX interrupt on the given USART.
Definition: periph_cpu.h:245
static bool msp430_usart_get_tx_irq_flag(const msp430_usart_params_t *usart_conf)
Get the TX IRQ flag of the given USART.
Definition: periph_cpu.h:295
static bool msp430_usart_get_rx_irq_flag(const msp430_usart_params_t *usart_conf)
Get the RX IRQ flag of the given USART.
Definition: periph_cpu.h:306
const msp430_usart_spi_params_t usart0_as_spi
MSP430 x1xx USART0 in SPI configuration.
void msp430_usart_release(const msp430_usart_params_t *params)
Release exclusive access to an USART peripheral and turn it off again.
const msp430_usart_uart_params_t usart0_as_uart
MSP430 x1xx USART0 in UART configuration.
void msp430_usart_acquire(const msp430_usart_params_t *params, const msp430_usart_conf_t *conf, uint8_t enable_mask)
Get exclusive access to an USART peripheral and initialize it for operation as configured.
msp430_usart_clk_t
MSP430 x1xx USART clock source.
Definition: periph_cpu.h:107
@ USART_CLK_UCLKI
UCLKI clock source (not supported yet)
Definition: periph_cpu.h:108
@ USART_CLK_AUX
auxiliary clock source
Definition: periph_cpu.h:109
@ USART_CLK_SUBMAIN
sub-system master clock source
Definition: periph_cpu.h:110
static void msp430_usart_disable_rx_irq(const msp430_usart_params_t *usart_conf)
Disable the RX interrupt on the given USART.
Definition: periph_cpu.h:284
static void msp430_usart_enable_rx_irq(const msp430_usart_params_t *usart_conf)
Enable the RX interrupt on the given USART.
Definition: periph_cpu.h:258
static void msp430_usart_clear_rx_irq_flag(const msp430_usart_params_t *usart_conf)
Clear the RX IRQ flag of the given USART.
Definition: periph_cpu.h:336
static void msp430_usart_disable_tx_irq(const msp430_usart_params_t *usart_conf)
Disable the TX interrupt on the given USART.
Definition: periph_cpu.h:271
static bool msp430_usart_are_both_irq_flags_set(const msp430_usart_params_t *usart_conf)
Check if both TX and RX IRQ flags are set on the given USART.
Definition: periph_cpu.h:317
msp430_usart_prescaler_t msp430_usart_prescale(uint32_t clock, uint16_t min_br)
Compute a suitable prescaler.
MSP430 x1xx USART configuration registers.
Definition: periph_cpu.h:129
uint8_t ctl
USART control register.
Definition: periph_cpu.h:131
msp430_usart_prescaler_t prescaler
Prescaler configuration.
Definition: periph_cpu.h:130
MSP430 x1xx USART configuration.
Definition: periph_cpu.h:92
uint8_t rx_irq_mask
The bitmask to enable the TX IRQ for this USART.
Definition: periph_cpu.h:97
msp430_usart_t * dev
The USART device to use.
Definition: periph_cpu.h:93
uint8_t tx_irq_mask
The bitmask to enable the TX IRQ for this USART.
Definition: periph_cpu.h:95
msp430_usart_sfr_t * sfr
The corresponding SFR registers.
Definition: periph_cpu.h:94
uint8_t num
Number of the USART.
Definition: periph_cpu.h:99
MSP430 x1xx USART prescaler configuration.
Definition: periph_cpu.h:116
msp430_usart_clk_t clk_source
Clock source to use.
Definition: periph_cpu.h:117
uint8_t br0
What to write in the BR0 register.
Definition: periph_cpu.h:118
uint8_t br1
What to write in the BR1 register.
Definition: periph_cpu.h:119
uint8_t mctl
USART modulation control register.
Definition: periph_cpu.h:120
USART Special Function Registers (SFR)
Definition: msp430_regs.h:70
REG8 IE
USART Interrupt Enable Register.
Definition: msp430_regs.h:71
REG8 IFG
USART Interrupt Flag Register.
Definition: msp430_regs.h:73
MSP430 x1xx SPI configuration, CPU level.
Definition: periph_cpu.h:185
uint8_t enable_mask
The bitmask to write to the SFR register to enable the USART device in SPI mode.
Definition: periph_cpu.h:194
gpio_t mosi
COPI (MOSI) pin.
Definition: periph_cpu.h:196
gpio_t miso
CIPO (MISO) pin.
Definition: periph_cpu.h:195
msp430_usart_params_t usart_params
The USART parameters.
Definition: periph_cpu.h:186
USART (UART, SPI and I2C) Registers.
Definition: msp430_regs.h:48
MSP430 x1xx UART configuration, CPU level.
Definition: periph_cpu.h:143
msp430_usart_params_t usart_params
The USART params.
Definition: periph_cpu.h:144
uint8_t tx_enable_mask
The bitmask to write to the SFR register to enable the USART device in UART mode with TX enabled.
Definition: periph_cpu.h:152
uint8_t rxtx_enable_mask
The bitmask to write to the SFR register to enable the USART device in UART mode with RX+TX enabled.
Definition: periph_cpu.h:163
SPI device configuration.
Definition: periph_cpu.h:337
const msp430_usart_spi_params_t * spi
The SPI configuration to use.
Definition: periph_cpu.h:204
UART device configuration.
Definition: periph_cpu.h:218
const msp430_usart_uart_params_t * uart
The UART configuration to use.
Definition: periph_cpu.h:172
Unit helper macros.
#define MHZ(x)
A macro to return the Hz in x MHz.
Definition: units.h:49
#define KHZ(x)
A macro to return the Hz in x kHz.
Definition: units.h:44
#define UXTCTL_SSEL_ACLK
Clock USART using auxiliary clock.
Definition: msp430_regs.h:88
#define UXTCTL_SSEL_UCLKI
Clock USART using UCLKI clock.
Definition: msp430_regs.h:87
#define UXTCTL_SSEL_SMCLK
Clock USART using sub-system master clock.
Definition: msp430_regs.h:89